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Side by Side Diff: src/arm/assembler-arm.h

Issue 1699173003: [Atomics] Add dmb/dsb/isb instructions to ARM (Closed) Base URL: http://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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982 void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al); 982 void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);
983 983
984 // Exception-generating instructions and debugging support 984 // Exception-generating instructions and debugging support
985 void stop(const char* msg, 985 void stop(const char* msg,
986 Condition cond = al, 986 Condition cond = al,
987 int32_t code = kDefaultStopCode); 987 int32_t code = kDefaultStopCode);
988 988
989 void bkpt(uint32_t imm16); // v5 and above 989 void bkpt(uint32_t imm16); // v5 and above
990 void svc(uint32_t imm24, Condition cond = al); 990 void svc(uint32_t imm24, Condition cond = al);
991 991
992 // Synchronization instructions
993 void dmb(BarrierOption option);
994 void dsb(BarrierOption option);
995 void isb(BarrierOption option);
996
992 // Coprocessor instructions 997 // Coprocessor instructions
993 998
994 void cdp(Coprocessor coproc, int opcode_1, 999 void cdp(Coprocessor coproc, int opcode_1,
995 CRegister crd, CRegister crn, CRegister crm, 1000 CRegister crd, CRegister crn, CRegister crm,
996 int opcode_2, Condition cond = al); 1001 int opcode_2, Condition cond = al);
997 1002
998 void cdp2(Coprocessor coproc, int opcode_1, 1003 void cdp2(Coprocessor coproc, int opcode_1,
999 CRegister crd, CRegister crn, CRegister crm, 1004 CRegister crd, CRegister crn, CRegister crm,
1000 int opcode_2); // v5 and above 1005 int opcode_2); // v5 and above
1001 1006
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1642 explicit EnsureSpace(Assembler* assembler) { 1647 explicit EnsureSpace(Assembler* assembler) {
1643 assembler->CheckBuffer(); 1648 assembler->CheckBuffer();
1644 } 1649 }
1645 }; 1650 };
1646 1651
1647 1652
1648 } // namespace internal 1653 } // namespace internal
1649 } // namespace v8 1654 } // namespace v8
1650 1655
1651 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1656 #endif // V8_ARM_ASSEMBLER_ARM_H_
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