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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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486 ASSERT(IsRegisterOffset()); | 486 ASSERT(IsRegisterOffset()); |
487 if (extend() == NO_EXTEND) { | 487 if (extend() == NO_EXTEND) { |
488 return Operand(regoffset(), shift(), shift_amount()); | 488 return Operand(regoffset(), shift(), shift_amount()); |
489 } else { | 489 } else { |
490 return Operand(regoffset(), extend(), shift_amount()); | 490 return Operand(regoffset(), extend(), shift_amount()); |
491 } | 491 } |
492 } | 492 } |
493 } | 493 } |
494 | 494 |
495 | 495 |
| 496 void Assembler::Unreachable() { |
| 497 #ifdef USE_SIMULATOR |
| 498 debug("UNREACHABLE", __LINE__, BREAK); |
| 499 #else |
| 500 // Crash by branching to 0. lr now points near the fault. |
| 501 Emit(BLR | Rn(xzr)); |
| 502 #endif |
| 503 } |
| 504 |
| 505 |
496 Address Assembler::target_pointer_address_at(Address pc) { | 506 Address Assembler::target_pointer_address_at(Address pc) { |
497 Instruction* instr = reinterpret_cast<Instruction*>(pc); | 507 Instruction* instr = reinterpret_cast<Instruction*>(pc); |
498 ASSERT(instr->IsLdrLiteralX()); | 508 ASSERT(instr->IsLdrLiteralX()); |
499 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); | 509 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); |
500 } | 510 } |
501 | 511 |
502 | 512 |
503 // Read/Modify the code target address in the branch/call instruction at pc. | 513 // Read/Modify the code target address in the branch/call instruction at pc. |
504 Address Assembler::target_address_at(Address pc) { | 514 Address Assembler::target_address_at(Address pc) { |
505 return Memory::Address_at(target_pointer_address_at(pc)); | 515 return Memory::Address_at(target_pointer_address_at(pc)); |
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1138 | 1148 |
1139 | 1149 |
1140 void Assembler::ClearRecordedAstId() { | 1150 void Assembler::ClearRecordedAstId() { |
1141 recorded_ast_id_ = TypeFeedbackId::None(); | 1151 recorded_ast_id_ = TypeFeedbackId::None(); |
1142 } | 1152 } |
1143 | 1153 |
1144 | 1154 |
1145 } } // namespace v8::internal | 1155 } } // namespace v8::internal |
1146 | 1156 |
1147 #endif // V8_A64_ASSEMBLER_A64_INL_H_ | 1157 #endif // V8_A64_ASSEMBLER_A64_INL_H_ |
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