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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 551 Strh(rt, addr); | 551 Strh(rt, addr); |
| 552 } else if (r.IsInteger32()) { | 552 } else if (r.IsInteger32()) { |
| 553 Str(rt.W(), addr); | 553 Str(rt.W(), addr); |
| 554 } else { | 554 } else { |
| 555 ASSERT(rt.Is64Bits()); | 555 ASSERT(rt.Is64Bits()); |
| 556 Str(rt, addr); | 556 Str(rt, addr); |
| 557 } | 557 } |
| 558 } | 558 } |
| 559 | 559 |
| 560 | 560 |
| 561 bool MacroAssembler::ShouldEmitVeneer(int max_reachable_pc, int margin) { | |
| 562 // Account for the branch around the veneers and the guard. | |
| 563 int protection_offset = 2 * kInstructionSize; | |
| 564 return pc_offset() > max_reachable_pc - margin - protection_offset - | |
| 565 static_cast<int>(unresolved_branches_.size() * kMaxVeneerCodeSize); | |
| 566 } | |
| 567 | |
| 568 | |
| 569 void MacroAssembler::EmitVeneers(bool need_protection) { | |
| 570 RecordComment("[ Veneers"); | |
| 571 | |
| 572 Label end; | |
| 573 if (need_protection) { | |
| 574 B(&end); | |
| 575 } | |
| 576 | |
| 577 EmitVeneersGuard(); | |
| 578 | |
| 579 { | |
| 580 InstructionAccurateScope scope(this); | |
| 581 Label size_check; | |
| 582 | |
| 583 std::multimap<int, FarBranchInfo>::iterator it, it_to_delete; | |
| 584 | |
| 585 it = unresolved_branches_.begin(); | |
| 586 while (it != unresolved_branches_.end()) { | |
| 587 if (ShouldEmitVeneer(it->first)) { | |
| 588 Instruction* branch = InstructionAt(it->second.pc_offset_); | |
| 589 Label* label = it->second.label_; | |
| 590 | |
| 591 #ifdef DEBUG | |
| 592 __ bind(&size_check); | |
| 593 #endif | |
| 594 // Patch the branch to point to the current position, and emit a branch | |
| 595 // to the label. | |
| 596 Instruction* veneer = reinterpret_cast<Instruction*>(pc_); | |
| 597 RemoveBranchFromLabelLinkChain(branch, label, veneer); | |
| 598 branch->SetImmPCOffsetTarget(veneer); | |
| 599 b(label); | |
| 600 #ifdef DEBUG | |
| 601 ASSERT(SizeOfCodeGeneratedSince(&size_check) <= kMaxVeneerCodeSize); | |
| 602 size_check.Unuse(); | |
| 603 #endif | |
| 604 | |
| 605 it_to_delete = it++; | |
| 606 unresolved_branches_.erase(it_to_delete); | |
| 607 } else { | |
| 608 ++it; | |
| 609 } | |
| 610 } | |
| 611 } | |
| 612 | |
| 613 Bind(&end); | |
| 614 | |
| 615 RecordComment("]"); | |
| 616 } | |
| 617 | |
| 618 | |
| 619 void MacroAssembler::EmitVeneersGuard() { | |
| 620 if (emit_debug_code()) { | |
| 621 Unreachable(); | |
| 622 } | |
| 623 } | |
| 624 | |
| 625 | |
| 626 void MacroAssembler::CheckVeneers(bool need_protection) { | |
| 627 if (unresolved_branches_.empty()) { | |
| 628 return; | |
| 629 } | |
| 630 | |
| 631 CHECK(pc_offset() < unresolved_branches_first_limit()); | |
| 632 int margin = kVeneerDistanceMargin; | |
| 633 if (!need_protection) { | |
| 634 // Prefer emitting veneers protected by an existing instruction. | |
| 635 margin += margin / 4; | |
|
ulan
2014/02/18 10:17:40
Where 4 comes from?
Alexandre Rames
2014/02/18 11:59:20
Complete finger in the air guess.
With a default m
| |
| 636 } | |
| 637 if (ShouldEmitVeneer(unresolved_branches_first_limit(), margin)) { | |
| 638 EmitVeneers(need_protection); | |
| 639 } | |
| 640 } | |
| 641 | |
| 642 | |
| 643 bool MacroAssembler::NeedExtraInstructionsOrRegisterBranch( | |
| 644 Label *label, ImmBranchType b_type) { | |
| 645 bool need_longer_range = false; | |
| 646 // There are two situations in which we care about the offset being out of | |
| 647 // range: | |
| 648 // - The label is bound but too far away. | |
| 649 // - The label is not bound but linked, and the previous branch | |
| 650 // instruction in the chain is too far away. | |
| 651 if (label->is_bound() || label->is_linked()) { | |
| 652 need_longer_range = | |
| 653 !Instruction::IsValidImmPCOffset(b_type, label->pos() - pc_offset()); | |
| 654 } | |
| 655 if (!need_longer_range && !label->is_bound()) { | |
| 656 int max_reachable_pc = pc_offset() + Instruction::ImmBranchRange(b_type); | |
| 657 unresolved_branches_.insert( | |
| 658 std::pair<int, FarBranchInfo>(max_reachable_pc, | |
| 659 FarBranchInfo(pc_offset(), label))); | |
|
ulan
2014/02/18 10:17:40
If the CheckVeneers below emits veneers then the p
Alexandre Rames
2014/02/18 11:59:20
Ouch. Thanks.
| |
| 660 } | |
| 661 CheckVeneers(true); | |
| 662 return need_longer_range; | |
| 663 } | |
| 664 | |
| 665 | |
| 666 void MacroAssembler::B(Label* label, Condition cond) { | |
| 667 ASSERT(allow_macro_instructions_); | |
| 668 ASSERT((cond != al) && (cond != nv)); | |
| 669 | |
| 670 if (NeedExtraInstructionsOrRegisterBranch(label, CondBranchType)) { | |
| 671 Label over; | |
| 672 b(&over, InvertCondition(cond)); | |
| 673 b(label); | |
| 674 bind(&over); | |
| 675 } else { | |
| 676 b(label, cond); | |
| 677 } | |
| 678 } | |
| 679 | |
| 680 | |
| 681 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) { | |
| 682 ASSERT(allow_macro_instructions_); | |
| 683 | |
| 684 if (NeedExtraInstructionsOrRegisterBranch(label, TestBranchType)) { | |
| 685 Label over; | |
| 686 tbz(rt, bit_pos, &over); | |
| 687 b(label); | |
| 688 bind(&over); | |
| 689 } else { | |
| 690 tbnz(rt, bit_pos, label); | |
| 691 } | |
| 692 } | |
| 693 | |
| 694 | |
| 695 void MacroAssembler::Tbz(const Register& rt, unsigned bit_pos, Label* label) { | |
| 696 ASSERT(allow_macro_instructions_); | |
| 697 | |
| 698 if (NeedExtraInstructionsOrRegisterBranch(label, TestBranchType)) { | |
| 699 Label over; | |
| 700 tbnz(rt, bit_pos, &over); | |
| 701 b(label); | |
| 702 bind(&over); | |
| 703 } else { | |
| 704 tbz(rt, bit_pos, label); | |
| 705 } | |
| 706 } | |
| 707 | |
| 708 | |
| 709 void MacroAssembler::Cbnz(const Register& rt, Label* label) { | |
| 710 ASSERT(allow_macro_instructions_); | |
| 711 | |
| 712 if (NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType)) { | |
| 713 Label over; | |
| 714 cbz(rt, &over); | |
| 715 b(label); | |
| 716 bind(&over); | |
| 717 } else { | |
| 718 cbnz(rt, label); | |
| 719 } | |
| 720 } | |
| 721 | |
| 722 | |
| 723 void MacroAssembler::Cbz(const Register& rt, Label* label) { | |
| 724 ASSERT(allow_macro_instructions_); | |
| 725 | |
| 726 if (NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType)) { | |
| 727 Label over; | |
| 728 cbnz(rt, &over); | |
| 729 b(label); | |
| 730 bind(&over); | |
| 731 } else { | |
| 732 cbz(rt, label); | |
| 733 } | |
| 734 } | |
| 735 | |
| 736 | |
| 561 // Pseudo-instructions. | 737 // Pseudo-instructions. |
| 562 | 738 |
| 563 | 739 |
| 564 void MacroAssembler::Abs(const Register& rd, const Register& rm, | 740 void MacroAssembler::Abs(const Register& rd, const Register& rm, |
| 565 Label* is_not_representable, | 741 Label* is_not_representable, |
| 566 Label* is_representable) { | 742 Label* is_representable) { |
| 567 ASSERT(allow_macro_instructions_); | 743 ASSERT(allow_macro_instructions_); |
| 568 ASSERT(AreSameSizeAndType(rd, rm)); | 744 ASSERT(AreSameSizeAndType(rd, rm)); |
| 569 | 745 |
| 570 Cmp(rm, 1); | 746 Cmp(rm, 1); |
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| 4772 } | 4948 } |
| 4773 } | 4949 } |
| 4774 | 4950 |
| 4775 | 4951 |
| 4776 #undef __ | 4952 #undef __ |
| 4777 | 4953 |
| 4778 | 4954 |
| 4779 } } // namespace v8::internal | 4955 } } // namespace v8::internal |
| 4780 | 4956 |
| 4781 #endif // V8_TARGET_ARCH_A64 | 4957 #endif // V8_TARGET_ARCH_A64 |
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