PPC: [crankshaft] Fix Math.min(0, 0)

src/crankshaft/ppc/lithium-codegen-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/crankshaft/ppc/lithium-codegen-ppc.h"
 
 #include "src/base/bits.h"
 #include "src/code-factory.h"
 #include "src/code-stubs.h"
 #include "src/crankshaft/hydrogen-osr.h"
@@ skipping 1942 matching lines @@
     __ bunordered(&check_nan_left);
     __ beq(&check_zero);
     __ b(cond, &return_left);
     __ b(&return_right);
 
     __ bind(&check_zero);
     __ fcmpu(left_reg, kDoubleRegZero);
     __ bne(&return_left);  // left == right != 0.
 
     // At this point, both left and right are either 0 or -0.
-    // N.B. The following works because +0 + -0 == +0
     if (operation == HMathMinMax::kMathMin) {
-      // For min we want logical-or of sign bit: -(-L + -R)
+      // Min: The algorithm is: -((-L) + (-R)), which in case of L and R being
+      // different registers is most efficiently expressed as -((-L) - R).
       __ fneg(left_reg, left_reg);
-      __ fsub(result_reg, left_reg, right_reg);
+      if (left_reg.is(right_reg)) {
+        __ fadd(result_reg, left_reg, right_reg);
+      } else {
+        __ fsub(result_reg, left_reg, right_reg);
+      }
       __ fneg(result_reg, result_reg);
     } else {
-      // For max we want logical-and of sign bit: (L + R)
+      // Max: The following works because +0 + -0 == +0
       __ fadd(result_reg, left_reg, right_reg);
     }
     __ b(&done);
 
     __ bind(&check_nan_left);
     __ fcmpu(left_reg, left_reg);
     __ bunordered(&return_left);  // left == NaN.
 
     __ bind(&return_right);
     if (!right_reg.is(result_reg)) {
@@ skipping 3797 matching lines @@
   __ Push(scope_info);
   __ push(ToRegister(instr->function()));
   CallRuntime(Runtime::kPushBlockContext, instr);
   RecordSafepoint(Safepoint::kNoLazyDeopt);
 }
 
 
 #undef __
 }  // namespace internal
 }  // namespace v8