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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
| 6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
| 7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
| 8 | 8 |
| 9 #include "vm/globals.h" // NOLINT | 9 #include "vm/globals.h" // NOLINT |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
| (...skipping 1321 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1332 | 1332 |
| 1333 void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) { | 1333 void Assembler::vminqs(QRegister qd, QRegister qn, QRegister qm) { |
| 1334 EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm); | 1334 EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm); |
| 1335 } | 1335 } |
| 1336 | 1336 |
| 1337 | 1337 |
| 1338 void Assembler::vmaxqs(QRegister qd, QRegister qn, QRegister qm) { | 1338 void Assembler::vmaxqs(QRegister qd, QRegister qn, QRegister qm) { |
| 1339 EmitSIMDqqq(B11 | B10 | B9 | B8, kSWord, qd, qn, qm); | 1339 EmitSIMDqqq(B11 | B10 | B9 | B8, kSWord, qd, qn, qm); |
| 1340 } | 1340 } |
| 1341 | 1341 |
| 1342 | 1342 #if 0 |
| 1343 // Moved to Arm32::AssemblerARM32::vabsq(). |
| 1343 void Assembler::vabsqs(QRegister qd, QRegister qm) { | 1344 void Assembler::vabsqs(QRegister qd, QRegister qm) { |
| 1344 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8, kSWord, | 1345 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8, kSWord, |
| 1345 qd, Q0, qm); | 1346 qd, Q0, qm); |
| 1346 } | 1347 } |
| 1347 | 1348 #endif |
| 1348 | 1349 |
| 1349 void Assembler::vnegqs(QRegister qd, QRegister qm) { | 1350 void Assembler::vnegqs(QRegister qd, QRegister qm) { |
| 1350 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8 | B7, kSWord, | 1351 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8 | B7, kSWord, |
| 1351 qd, Q0, qm); | 1352 qd, Q0, qm); |
| 1352 } | 1353 } |
| 1353 | 1354 |
| 1354 | 1355 |
| 1355 void Assembler::vrecpeqs(QRegister qd, QRegister qm) { | 1356 void Assembler::vrecpeqs(QRegister qd, QRegister qm) { |
| 1356 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B8, kSWord, | 1357 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B8, kSWord, |
| 1357 qd, Q0, qm); | 1358 qd, Q0, qm); |
| (...skipping 2334 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3692 | 3693 |
| 3693 | 3694 |
| 3694 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3695 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3695 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3696 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3696 return fpu_reg_names[reg]; | 3697 return fpu_reg_names[reg]; |
| 3697 } | 3698 } |
| 3698 | 3699 |
| 3699 } // namespace dart | 3700 } // namespace dart |
| 3700 | 3701 |
| 3701 #endif // defined TARGET_ARCH_ARM | 3702 #endif // defined TARGET_ARCH_ARM |
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