Fix left shift with constant on ARM.

runtime/vm/intermediate_language_arm.cc

Index: runtime/vm/intermediate_language_arm.cc
===================================================================
--- runtime/vm/intermediate_language_arm.cc	(revision 24032)
+++ runtime/vm/intermediate_language_arm.cc	(working copy)
@@ -1054,13 +1054,17 @@
 
 
 LocationSummary* LoadUntaggedInstr::MakeLocationSummary() const {
-  UNIMPLEMENTED();
-  return NULL;
+  const intptr_t kNumInputs = 1;
+  return LocationSummary::Make(kNumInputs,
+                               Location::RequiresRegister(),
+                               LocationSummary::kNoCall);
 }
 
 
 void LoadUntaggedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  UNIMPLEMENTED();
+  Register object = locs()->in(0).reg();
+  Register result = locs()->out().reg();
+  __ LoadFromOffset(kLoadWord, result, object, offset() - kHeapObjectTag);
 }
 
 
@@ -1363,10 +1367,6 @@
       locs->set_in(2, Location::WritableRegister());
       break;
     case kTypedDataFloat32ArrayCid:
-      // TODO(regis): Verify.
-      // Need temp register for float-to-double conversion.
-      locs->AddTemp(Location::RequiresFpuRegister());
-      // Fall through.
     case kTypedDataFloat64ArrayCid:  // TODO(srdjan): Support Float64 constants.
     case kTypedDataFloat32x4ArrayCid:
       locs->set_in(2, Location::RequiresFpuRegister());
@@ -1496,7 +1496,16 @@
       break;
     }
     case kTypedDataFloat32ArrayCid:
+      // Convert to single precision.
+      __ vcvtsd(STMP, locs()->in(2).fpu_reg());
+      // Store.
+      __ add(index.reg(), index.reg(), ShifterOperand(array));
+      __ StoreSToOffset(STMP, index.reg(), 0);
+      break;
     case kTypedDataFloat64ArrayCid:
+      __ add(index.reg(), index.reg(), ShifterOperand(array));
+      __ StoreDToOffset(locs()->in(2).fpu_reg(), index.reg(), 0);
+      break;
     case kTypedDataFloat32x4ArrayCid:
       UNIMPLEMENTED();
       break;
@@ -2126,6 +2135,7 @@
       if (left_int == 0) {
         __ cmp(right, ShifterOperand(0));
         __ b(deopt, MI);
+        __ mov(result, ShifterOperand(0));
         return;
       }
       const intptr_t max_right = kSmiBits - Utils::HighestBit(left_int);
@@ -2339,6 +2349,7 @@
 
         if (value == 0) {
           // TODO(vegorov): should be handled outside.
+          __ MoveRegister(result, left);
           break;
         } else if (value < 0) {
           // TODO(vegorov): should be handled outside.
@@ -2426,7 +2437,22 @@
       break;
     }
     case Token::kSHR: {
-      UNIMPLEMENTED();
+      if (CanDeoptimize()) {
+        __ CompareImmediate(right, 0);
+        __ b(deopt, LT);
+      }
+      __ SmiUntag(right);
+      // sarl operation masks the count to 5 bits.
+      const intptr_t kCountLimit = 0x1F;
+      Range* right_range = this->right()->definition()->range();
+      if ((right_range == NULL) ||
+          !right_range->IsWithin(RangeBoundary::kMinusInfinity, kCountLimit)) {
+        __ CompareImmediate(right, kCountLimit);
+        __ LoadImmediate(right, kCountLimit, GT);
+      }
+      __ SmiUntag(left);
+      __ Asr(result, left, right);
+      __ SmiTag(result);
       break;
     }
     case Token::kDIV: {