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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 1694833002: MIPS: Support r6 max, min floating point instructions. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebased. Created 4 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
(...skipping 219 matching lines...) Expand 10 before | Expand all | Expand 10 after
230 Condition cond, 230 Condition cond,
231 Register reg, 231 Register reg,
232 const Operand& op); 232 const Operand& op);
233 233
234 // Swap two registers. If the scratch register is omitted then a slightly 234 // Swap two registers. If the scratch register is omitted then a slightly
235 // less efficient form using xor instead of mov is emitted. 235 // less efficient form using xor instead of mov is emitted.
236 void Swap(Register reg1, Register reg2, Register scratch = no_reg); 236 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
237 237
238 void Call(Label* target); 238 void Call(Label* target);
239 239
240 void Move(Register dst, Handle<Object> handle) { li(dst, handle); } 240 inline void Move(Register dst, Handle<Object> handle) { li(dst, handle); }
241 void Move(Register dst, Smi* smi) { li(dst, Operand(smi)); } 241 inline void Move(Register dst, Smi* smi) { li(dst, Operand(smi)); }
242 242
243 inline void Move(Register dst, Register src) { 243 inline void Move(Register dst, Register src) {
244 if (!dst.is(src)) { 244 if (!dst.is(src)) {
245 mov(dst, src); 245 mov(dst, src);
246 } 246 }
247 } 247 }
248 248
249 inline void Move(FPURegister dst, FPURegister src) { 249 inline void Move_d(FPURegister dst, FPURegister src) {
250 if (!dst.is(src)) { 250 if (!dst.is(src)) {
251 mov_d(dst, src); 251 mov_d(dst, src);
252 } 252 }
253 } 253 }
254 254
255 inline void Move_s(FPURegister dst, FPURegister src) {
256 if (!dst.is(src)) {
257 mov_s(dst, src);
258 }
259 }
260
261 inline void Move(FPURegister dst, FPURegister src) { Move_d(dst, src); }
262
255 inline void Move(Register dst_low, Register dst_high, FPURegister src) { 263 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
256 mfc1(dst_low, src); 264 mfc1(dst_low, src);
257 Mfhc1(dst_high, src); 265 Mfhc1(dst_high, src);
258 } 266 }
259 267
260 inline void FmoveHigh(Register dst_high, FPURegister src) { 268 inline void FmoveHigh(Register dst_high, FPURegister src) {
261 Mfhc1(dst_high, src); 269 Mfhc1(dst_high, src);
262 } 270 }
263 271
264 inline void FmoveHigh(FPURegister dst, Register src_high) { 272 inline void FmoveHigh(FPURegister dst, Register src_high) {
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278 286
279 void Move(FPURegister dst, float imm); 287 void Move(FPURegister dst, float imm);
280 void Move(FPURegister dst, double imm); 288 void Move(FPURegister dst, double imm);
281 289
282 // Conditional move. 290 // Conditional move.
283 void Movz(Register rd, Register rs, Register rt); 291 void Movz(Register rd, Register rs, Register rt);
284 void Movn(Register rd, Register rs, Register rt); 292 void Movn(Register rd, Register rs, Register rt);
285 void Movt(Register rd, Register rs, uint16_t cc = 0); 293 void Movt(Register rd, Register rs, uint16_t cc = 0);
286 void Movf(Register rd, Register rs, uint16_t cc = 0); 294 void Movf(Register rd, Register rs, uint16_t cc = 0);
287 295
296 // Min, Max macros.
297 // On pre-r6 these functions may modify at and t8 registers.
298 void MinNaNCheck_d(FPURegister dst, FPURegister src1, FPURegister src2,
299 Label* nan = nullptr);
300 void MaxNaNCheck_d(FPURegister dst, FPURegister src1, FPURegister src2,
301 Label* nan = nullptr);
302 void MinNaNCheck_s(FPURegister dst, FPURegister src1, FPURegister src2,
303 Label* nan = nullptr);
304 void MaxNaNCheck_s(FPURegister dst, FPURegister src1, FPURegister src2,
305 Label* nan = nullptr);
306
288 void Clz(Register rd, Register rs); 307 void Clz(Register rd, Register rs);
289 308
290 // Jump unconditionally to given label. 309 // Jump unconditionally to given label.
291 // We NEED a nop in the branch delay slot, as it used by v8, for example in 310 // We NEED a nop in the branch delay slot, as it used by v8, for example in
292 // CodeGenerator::ProcessDeferred(). 311 // CodeGenerator::ProcessDeferred().
293 // Currently the branch delay slot is filled by the MacroAssembler. 312 // Currently the branch delay slot is filled by the MacroAssembler.
294 // Use rather b(Label) for code generation. 313 // Use rather b(Label) for code generation.
295 void jmp(Label* L) { 314 void jmp(Label* L) {
296 Branch(L); 315 Branch(L);
297 } 316 }
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1823 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1842 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1824 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1843 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1825 #else 1844 #else
1826 #define ACCESS_MASM(masm) masm-> 1845 #define ACCESS_MASM(masm) masm->
1827 #endif 1846 #endif
1828 1847
1829 } // namespace internal 1848 } // namespace internal
1830 } // namespace v8 1849 } // namespace v8
1831 1850
1832 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1851 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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