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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 299 reg_code = f; | 299 reg_code = f; |
| 300 DCHECK(is_valid()); | 300 DCHECK(is_valid()); |
| 301 } | 301 } |
| 302 // Unfortunately we can't make this private in a struct. | 302 // Unfortunately we can't make this private in a struct. |
| 303 int reg_code; | 303 int reg_code; |
| 304 }; | 304 }; |
| 305 | 305 |
| 306 const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; | 306 const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; |
| 307 const FPUControlRegister FCSR = { kFCSRRegister }; | 307 const FPUControlRegister FCSR = { kFCSRRegister }; |
| 308 | 308 |
| 309 // TODO(mips64) Define SIMD registers. |
| 310 typedef DoubleRegister Simd128Register; |
| 309 | 311 |
| 310 // ----------------------------------------------------------------------------- | 312 // ----------------------------------------------------------------------------- |
| 311 // Machine instruction Operands. | 313 // Machine instruction Operands. |
| 312 const int kSmiShift = kSmiTagSize + kSmiShiftSize; | 314 const int kSmiShift = kSmiTagSize + kSmiShiftSize; |
| 313 const uint64_t kSmiShiftMask = (1UL << kSmiShift) - 1; | 315 const uint64_t kSmiShiftMask = (1UL << kSmiShift) - 1; |
| 314 // Class Operand represents a shifter operand in data processing instructions. | 316 // Class Operand represents a shifter operand in data processing instructions. |
| 315 class Operand BASE_EMBEDDED { | 317 class Operand BASE_EMBEDDED { |
| 316 public: | 318 public: |
| 317 // Immediate. | 319 // Immediate. |
| 318 INLINE(explicit Operand(int64_t immediate, | 320 INLINE(explicit Operand(int64_t immediate, |
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| 1498 public: | 1500 public: |
| 1499 explicit EnsureSpace(Assembler* assembler) { | 1501 explicit EnsureSpace(Assembler* assembler) { |
| 1500 assembler->CheckBuffer(); | 1502 assembler->CheckBuffer(); |
| 1501 } | 1503 } |
| 1502 }; | 1504 }; |
| 1503 | 1505 |
| 1504 } // namespace internal | 1506 } // namespace internal |
| 1505 } // namespace v8 | 1507 } // namespace v8 |
| 1506 | 1508 |
| 1507 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1509 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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