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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 | 5 |
| 6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 8 // on regular desktop machines. | 8 // on regular desktop machines. |
| 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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| 308 void TraceMemRd(int64_t addr, int64_t value); | 308 void TraceMemRd(int64_t addr, int64_t value); |
| 309 | 309 |
| 310 // Operations depending on endianness. | 310 // Operations depending on endianness. |
| 311 // Get Double Higher / Lower word. | 311 // Get Double Higher / Lower word. |
| 312 inline int32_t GetDoubleHIW(double* addr); | 312 inline int32_t GetDoubleHIW(double* addr); |
| 313 inline int32_t GetDoubleLOW(double* addr); | 313 inline int32_t GetDoubleLOW(double* addr); |
| 314 // Set Double Higher / Lower word. | 314 // Set Double Higher / Lower word. |
| 315 inline int32_t SetDoubleHIW(double* addr); | 315 inline int32_t SetDoubleHIW(double* addr); |
| 316 inline int32_t SetDoubleLOW(double* addr); | 316 inline int32_t SetDoubleLOW(double* addr); |
| 317 | 317 |
| 318 // Min/Max template functions for Double and Single arguments. | |
| 319 enum class IsMin : int { kMin = 0, kMax = 1 }; | |
| 320 | |
| 321 template <typename T> | |
| 322 bool FPUProcessNaNsAndZeros(T a, T b, IsMin min, T& result); | |
| 323 | |
| 324 template <typename T> | |
| 325 T FPUMin(T a, T b); | |
| 326 | |
| 327 template <typename T> | |
| 328 T FPUMax(T a, T b); | |
| 329 | |
| 330 template <typename T> | |
| 331 T FPUMinA(T a, T b); | |
| 332 | |
| 333 template <typename T> | |
| 334 T FPUMaxA(T a, T b); | |
| 335 | |
| 336 // functions called from DecodeTypeRegister. | 318 // functions called from DecodeTypeRegister. |
| 337 void DecodeTypeRegisterCOP1(); | 319 void DecodeTypeRegisterCOP1(); |
| 338 | 320 |
| 339 void DecodeTypeRegisterCOP1X(); | 321 void DecodeTypeRegisterCOP1X(); |
| 340 | 322 |
| 341 void DecodeTypeRegisterSPECIAL(); | 323 void DecodeTypeRegisterSPECIAL(); |
| 342 | 324 |
| 343 | 325 |
| 344 void DecodeTypeRegisterSPECIAL2(); | 326 void DecodeTypeRegisterSPECIAL2(); |
| 345 | 327 |
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| 540 static inline void UnregisterCTryCatch(Isolate* isolate) { | 522 static inline void UnregisterCTryCatch(Isolate* isolate) { |
| 541 Simulator::current(isolate)->PopAddress(); | 523 Simulator::current(isolate)->PopAddress(); |
| 542 } | 524 } |
| 543 }; | 525 }; |
| 544 | 526 |
| 545 } // namespace internal | 527 } // namespace internal |
| 546 } // namespace v8 | 528 } // namespace v8 |
| 547 | 529 |
| 548 #endif // !defined(USE_SIMULATOR) | 530 #endif // !defined(USE_SIMULATOR) |
| 549 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 531 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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