Index: src/IceTargetLoweringMIPS32.cpp |
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp |
index e34dd5d86c675ed01d2129c57e1aaa0bb63088f3..3b2ad78d7f4211b146a7f8bd77ba40144702b58c 100644 |
--- a/src/IceTargetLoweringMIPS32.cpp |
+++ b/src/IceTargetLoweringMIPS32.cpp |
@@ -360,7 +360,7 @@ Variable *TargetMIPS32::makeReg(Type Type, RegNumT RegNum) { |
// There aren't any 64-bit integer registers for Mips32. |
assert(Type != IceType_i64); |
Variable *Reg = Func->makeVariable(Type); |
- if (RegNum == RegNumT::NoRegister) |
+ if (RegNum.hasNoValue()) |
Jim Stichnoth
2016/02/12 18:29:54
if (RegNum.hasValue()) ...
as in the ARM file
rkotlerimgtec
2016/02/12 22:02:01
Done.
|
Reg->setMustHaveReg(); |
else |
Reg->setRegNum(RegNum); |
@@ -1253,7 +1253,7 @@ Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed, |
// Also try the inverse and use MVN if possible. |
// Do a movw/movt to a register. |
Variable *Reg; |
- if (RegNum == RegNumT::NoRegister) |
+ if (RegNum.hasNoValue()) |
Jim Stichnoth
2016/02/12 18:29:54
if (RegNum.hasValue()) ...
rkotlerimgtec
2016/02/12 22:02:01
Done.
|
Reg = makeReg(Ty, RegNum); |
else |
Reg = getPhysicalRegister(RegNum); |
@@ -1281,7 +1281,7 @@ Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed, |
// register, or |
// RegNum is required and Var->getRegNum() doesn't match. |
if ((!(Allowed & Legal_Mem) && !MustHaveRegister) || |
- (RegNum != RegNumT::NoRegister && RegNum != Var->getRegNum())) { |
+ (RegNum.hasValue() && RegNum != Var->getRegNum())) { |
From = copyToReg(From, RegNum); |
} |
return From; |