Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(110)

Side by Side Diff: src/IceTargetLoweringX8664Traits.h

Issue 1691193002: Subzero: Prototype to make use of RegNumT::No Register more concise (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: changes suggested by stichnot Created 4 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceTargetLoweringX8664.cpp ('k') | src/IceTargetLoweringX86Base.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=// 1 //===- subzero/src/IceTargetLoweringX8664Traits.h - x86-64 traits -*- C++ -*-=//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 383 matching lines...) Expand 10 before | Expand all | Expand 10 after
394 return RegisterSet::Reg_ax; 394 return RegisterSet::Reg_ax;
395 case IceType_i32: 395 case IceType_i32:
396 return RegisterSet::Reg_eax; 396 return RegisterSet::Reg_eax;
397 case IceType_i64: 397 case IceType_i64:
398 return RegisterSet::Reg_rax; 398 return RegisterSet::Reg_rax;
399 } 399 }
400 } 400 }
401 401
402 public: 402 public:
403 static RegNumT getGprForType(Type Ty, RegNumT RegNum) { 403 static RegNumT getGprForType(Type Ty, RegNumT RegNum) {
404 assert(RegNum != RegNumT::NoRegister); 404 assert(RegNum.hasValue());
405 405
406 if (!isScalarIntegerType(Ty)) { 406 if (!isScalarIntegerType(Ty)) {
407 return RegNum; 407 return RegNum;
408 } 408 }
409 409
410 assert(Ty == IceType_i1 || Ty == IceType_i8 || Ty == IceType_i16 || 410 assert(Ty == IceType_i1 || Ty == IceType_i8 || Ty == IceType_i16 ||
411 Ty == IceType_i32 || Ty == IceType_i64); 411 Ty == IceType_i32 || Ty == IceType_i64);
412 412
413 if (RegNum == RegisterSet::Reg_ah) { 413 if (RegNum == RegisterSet::Reg_ah) {
414 assert(Ty == IceType_i8); 414 assert(Ty == IceType_i8);
(...skipping 308 matching lines...) Expand 10 before | Expand all | Expand 10 after
723 /// The maximum number of arguments to pass in GPR registers 723 /// The maximum number of arguments to pass in GPR registers
724 static constexpr uint32_t X86_MAX_GPR_ARGS = 6; 724 static constexpr uint32_t X86_MAX_GPR_ARGS = 6;
725 /// Whether scalar floating point arguments are passed in XMM registers 725 /// Whether scalar floating point arguments are passed in XMM registers
726 static constexpr bool X86_PASS_SCALAR_FP_IN_XMM = true; 726 static constexpr bool X86_PASS_SCALAR_FP_IN_XMM = true;
727 /// Get the register for a given argument slot in the XMM registers. 727 /// Get the register for a given argument slot in the XMM registers.
728 static RegNumT getRegisterForXmmArgNum(uint32_t ArgNum) { 728 static RegNumT getRegisterForXmmArgNum(uint32_t ArgNum) {
729 // TODO(sehr): Change to use the CCArg technique used in ARM32. 729 // TODO(sehr): Change to use the CCArg technique used in ARM32.
730 static_assert(RegisterSet::Reg_xmm0 + 1 == RegisterSet::Reg_xmm1, 730 static_assert(RegisterSet::Reg_xmm0 + 1 == RegisterSet::Reg_xmm1,
731 "Inconsistency between XMM register numbers and ordinals"); 731 "Inconsistency between XMM register numbers and ordinals");
732 if (ArgNum >= X86_MAX_XMM_ARGS) { 732 if (ArgNum >= X86_MAX_XMM_ARGS) {
733 return RegNumT::NoRegister; 733 return RegNumT();
734 } 734 }
735 return RegNumT::fixme(RegisterSet::Reg_xmm0 + ArgNum); 735 return RegNumT::fixme(RegisterSet::Reg_xmm0 + ArgNum);
736 } 736 }
737 /// Get the register for a given argument slot in the GPRs. 737 /// Get the register for a given argument slot in the GPRs.
738 static RegNumT getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) { 738 static RegNumT getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) {
739 if (ArgNum >= X86_MAX_GPR_ARGS) { 739 if (ArgNum >= X86_MAX_GPR_ARGS) {
740 return RegNumT::NoRegister; 740 return RegNumT();
741 } 741 }
742 static const RegisterSet::AllRegisters GprForArgNum[] = { 742 static const RegisterSet::AllRegisters GprForArgNum[] = {
743 RegisterSet::Reg_rdi, RegisterSet::Reg_rsi, RegisterSet::Reg_rdx, 743 RegisterSet::Reg_rdi, RegisterSet::Reg_rsi, RegisterSet::Reg_rdx,
744 RegisterSet::Reg_rcx, RegisterSet::Reg_r8, RegisterSet::Reg_r9, 744 RegisterSet::Reg_rcx, RegisterSet::Reg_r8, RegisterSet::Reg_r9,
745 }; 745 };
746 static_assert(llvm::array_lengthof(GprForArgNum) == X86_MAX_GPR_ARGS, 746 static_assert(llvm::array_lengthof(GprForArgNum) == X86_MAX_GPR_ARGS,
747 "Mismatch between MAX_GPR_ARGS and GprForArgNum."); 747 "Mismatch between MAX_GPR_ARGS and GprForArgNum.");
748 assert(Ty == IceType_i64 || Ty == IceType_i32); 748 assert(Ty == IceType_i64 || Ty == IceType_i32);
749 return getGprForType(Ty, GprForArgNum[ArgNum]); 749 return getGprForType(Ty, GprForArgNum[ArgNum]);
750 } 750 }
(...skipping 281 matching lines...) Expand 10 before | Expand all | Expand 10 after
1032 const char *FldString; // s, l, or <blank> 1032 const char *FldString; // s, l, or <blank>
1033 } TypeAttributes[]; 1033 } TypeAttributes[];
1034 }; 1034 };
1035 1035
1036 using Traits = ::Ice::X8664::TargetX8664Traits; 1036 using Traits = ::Ice::X8664::TargetX8664Traits;
1037 } // end of namespace X8664 1037 } // end of namespace X8664
1038 1038
1039 } // end of namespace Ice 1039 } // end of namespace Ice
1040 1040
1041 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H 1041 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H
OLDNEW
« no previous file with comments | « src/IceTargetLoweringX8664.cpp ('k') | src/IceTargetLoweringX86Base.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698