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1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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412 if (Offset != nullptr) { | 412 if (Offset != nullptr) { |
413 if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { | 413 if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { |
414 NeedsLea = CR->getName() != "" || CR->getOffset() < 0; | 414 NeedsLea = CR->getName() != "" || CR->getOffset() < 0; |
415 } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Offset)) { | 415 } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Offset)) { |
416 NeedsLea = Imm->getValue() < 0; | 416 NeedsLea = Imm->getValue() < 0; |
417 } else { | 417 } else { |
418 llvm::report_fatal_error("Unexpected Offset type."); | 418 llvm::report_fatal_error("Unexpected Offset type."); |
419 } | 419 } |
420 } | 420 } |
421 | 421 |
422 auto RegNum = RegNumT::NoRegister; | 422 RegNumT RegNum, RegNum32; |
423 auto RegNum32 = RegNumT::NoRegister; | |
424 if (T != nullptr) { | 423 if (T != nullptr) { |
425 if (T->hasReg()) { | 424 if (T->hasReg()) { |
426 RegNum = Traits::getGprForType(IceType_i64, T->getRegNum()); | 425 RegNum = Traits::getGprForType(IceType_i64, T->getRegNum()); |
427 RegNum32 = Traits::getGprForType(IceType_i32, RegNum); | 426 RegNum32 = Traits::getGprForType(IceType_i32, RegNum); |
428 // At this point, if T was assigned to rsp/rbp, then we would have already | 427 // At this point, if T was assigned to rsp/rbp, then we would have already |
429 // made this the ZeroReg. | 428 // made this the ZeroReg. |
430 assert(RegNum != Traits::RegisterSet::Reg_rsp); | 429 assert(RegNum != Traits::RegisterSet::Reg_rsp); |
431 assert(RegNum != Traits::RegisterSet::Reg_rbp); | 430 assert(RegNum != Traits::RegisterSet::Reg_rbp); |
432 } | 431 } |
433 | 432 |
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806 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \ | 805 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \ |
807 static_assert(_table1_##tag == _table2_##tag, \ | 806 static_assert(_table1_##tag == _table2_##tag, \ |
808 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); | 807 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); |
809 ICETYPE_TABLE | 808 ICETYPE_TABLE |
810 #undef X | 809 #undef X |
811 } // end of namespace dummy3 | 810 } // end of namespace dummy3 |
812 } // end of anonymous namespace | 811 } // end of anonymous namespace |
813 | 812 |
814 } // end of namespace X8664 | 813 } // end of namespace X8664 |
815 } // end of namespace Ice | 814 } // end of namespace Ice |
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