Subzero: Prototype to make use of RegNumT::No Register more concise

src/IceTargetLoweringX8632Traits.h

 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 357 matching lines @@
     case IceType_i16:
       return RegisterSet::Reg_ax;
     case IceType_i32:
       return RegisterSet::Reg_eax;
     }
   }
 
 public:
   // Return a register in RegNum's alias set that is suitable for Ty.
   static RegNumT getGprForType(Type Ty, RegNumT RegNum) {
-    assert(RegNum != RegNumT::NoRegister);
+    assert(RegNum.hasValue());
 
     if (!isScalarIntegerType(Ty)) {
       return RegNum;
     }
 
     // [abcd]h registers are not convertible to their ?l, ?x, and e?x versions.
     switch (RegNum) {
     default:
       break;
     case RegisterSet::Reg_ah:
@@ skipping 290 matching lines @@
   /// The maximum number of arguments to pass in GPR registers
   static constexpr uint32_t X86_MAX_GPR_ARGS = 0;
   /// Whether scalar floating point arguments are passed in XMM registers
   static constexpr bool X86_PASS_SCALAR_FP_IN_XMM = false;
   /// Get the register for a given argument slot in the XMM registers.
   static RegNumT getRegisterForXmmArgNum(uint32_t ArgNum) {
     // TODO(sehr): Change to use the CCArg technique used in ARM32.
     static_assert(RegisterSet::Reg_xmm0 + 1 == RegisterSet::Reg_xmm1,
                   "Inconsistency between XMM register numbers and ordinals");
     if (ArgNum >= X86_MAX_XMM_ARGS) {
-      return RegNumT::NoRegister;
+      return RegNumT();
     }
     return RegNumT::fixme(RegisterSet::Reg_xmm0 + ArgNum);
   }
   /// Get the register for a given argument slot in the GPRs.
   static RegNumT getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) {
     assert(Ty == IceType_i64 || Ty == IceType_i32);
     (void)Ty;
     (void)ArgNum;
-    return RegNumT::NoRegister;
+    return RegNumT();
   }
 
   /// The number of bits in a byte
   static constexpr uint32_t X86_CHAR_BIT = 8;
   /// Stack alignment. This is defined in IceTargetLoweringX8632.cpp because it
   /// is used as an argument to std::max(), and the default std::less<T> has an
   /// operator(T const&, T const&) which requires this member to have an
   /// address.
   static const uint32_t X86_STACK_ALIGNMENT_BYTES;
   /// Size of the return address on the stack
@@ skipping 282 matching lines @@
 
   static uint8_t InstSegmentPrefixes[];
 };
 
 using Traits = ::Ice::X8632::TargetX8632Traits;
 } // end of namespace X8632
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H