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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 1691193002: Subzero: Prototype to make use of RegNumT::No Register more concise (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: changes suggested by stichnot Created 4 years, 10 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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213 /// without creating any new instructions or operands. 213 /// without creating any new instructions or operands.
214 enum OperandLegalization { 214 enum OperandLegalization {
215 Legal_None = 0, 215 Legal_None = 0,
216 Legal_Reg = 1 << 0, // physical register, not stack location 216 Legal_Reg = 1 << 0, // physical register, not stack location
217 Legal_Imm = 1 << 1, 217 Legal_Imm = 1 << 1,
218 Legal_Mem = 1 << 2, 218 Legal_Mem = 1 << 2,
219 Legal_Default = ~Legal_None 219 Legal_Default = ~Legal_None
220 }; 220 };
221 typedef uint32_t LegalMask; 221 typedef uint32_t LegalMask;
222 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, 222 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default,
223 RegNumT RegNum = RegNumT::NoRegister); 223 RegNumT RegNum = RegNumT());
224 224
225 Variable *legalizeToVar(Operand *From, RegNumT RegNum = RegNumT::NoRegister); 225 Variable *legalizeToVar(Operand *From, RegNumT RegNum = RegNumT());
226 226
227 Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT::NoRegister); 227 Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT());
228 228
229 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT::NoRegister); 229 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
230 static Type stackSlotType(); 230 static Type stackSlotType();
231 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT::NoRegister); 231 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT());
232 232
233 void addProlog(CfgNode *Node) override; 233 void addProlog(CfgNode *Node) override;
234 void addEpilog(CfgNode *Node) override; 234 void addEpilog(CfgNode *Node) override;
235 235
236 // Ensure that a 64-bit Variable has been split into 2 32-bit 236 // Ensure that a 64-bit Variable has been split into 2 32-bit
237 // Variables, creating them if necessary. This is needed for all 237 // Variables, creating them if necessary. This is needed for all
238 // I64 operations. 238 // I64 operations.
239 void split64(Variable *Var); 239 void split64(Variable *Var);
240 Operand *loOperand(Operand *Operand); 240 Operand *loOperand(Operand *Operand);
241 Operand *hiOperand(Operand *Operand); 241 Operand *hiOperand(Operand *Operand);
242 242
243 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT::NoRegister); 243 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
244 244
245 protected: 245 protected:
246 explicit TargetMIPS32(Cfg *Func); 246 explicit TargetMIPS32(Cfg *Func);
247 247
248 void postLower() override; 248 void postLower() override;
249 249
250 void lowerAlloca(const InstAlloca *Instr) override; 250 void lowerAlloca(const InstAlloca *Instr) override;
251 void lowerArithmetic(const InstArithmetic *Instr) override; 251 void lowerArithmetic(const InstArithmetic *Instr) override;
252 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest, 252 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest,
253 Operand *Src0, Operand *Src1); 253 Operand *Src0, Operand *Src1);
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333 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 333 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
334 334
335 private: 335 private:
336 ~TargetHeaderMIPS32() = default; 336 ~TargetHeaderMIPS32() = default;
337 }; 337 };
338 338
339 } // end of namespace MIPS32 339 } // end of namespace MIPS32
340 } // end of namespace Ice 340 } // end of namespace Ice
341 341
342 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 342 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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