Subzero: Prototype to make use of RegNumT::No Register more concise

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1165 matching lines @@
     return;
   }
   if (Var->mustHaveReg()) {
     llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName(Func) +
                              ") has no register assigned - function " +
                              Func->getFunctionName());
   }
   assert(!Var->isRematerializable());
   int32_t Offset = Var->getStackOffset();
   auto BaseRegNum = Var->getBaseRegNum();
-  if (BaseRegNum == RegNumT::NoRegister) {
+  if (BaseRegNum.hasNoValue()) {
     BaseRegNum = getFrameOrStackReg();
   }
   const Type VarTy = Var->getType();
   Str << "[" << getRegName(BaseRegNum, VarTy);
   if (Offset != 0) {
     Str << ", #" << Offset;
   }
   Str << "]";
 }
 
@@ skipping 4612 matching lines @@
 // TODO(jpp): remove unneeded else clauses in legalize.
 Operand *TargetARM32::legalize(Operand *From, LegalMask Allowed,
                                RegNumT RegNum) {
   Type Ty = From->getType();
   // Assert that a physical register is allowed. To date, all calls to
   // legalize() allow a physical register. Legal_Flex converts registers to the
   // right type OperandARM32FlexReg as needed.
   assert(Allowed & Legal_Reg);
 
   // Copied ipsis literis from TargetX86Base<Machine>.
-  if (RegNum == RegNumT::NoRegister) {
+  if (RegNum.hasNoValue()) {
     if (Variable *Subst = getContext().availabilityGet(From)) {
       // At this point we know there is a potential substitution available.
       if (!Subst->isRematerializable() && Subst->mustHaveReg() &&
           !Subst->hasReg()) {
         // At this point we know the substitution will have a register.
         if (From->getType() == Subst->getType()) {
           // At this point we know the substitution's register is compatible.
           return Subst;
         }
       }
@@ skipping 181 matching lines @@
     }
     // Check if the variable is guaranteed a physical register. This can happen
     // either when the variable is pre-colored or when it is assigned infinite
     // weight.
     bool MustHaveRegister = (Var->hasReg() || Var->mustHaveReg());
     // We need a new physical register for the operand if:
     //   Mem is not allowed and Var isn't guaranteed a physical
     //   register, or
     //   RegNum is required and Var->getRegNum() doesn't match.
     if ((!(Allowed & Legal_Mem) && !MustHaveRegister) ||
-        (RegNum != RegNumT::NoRegister && RegNum != Var->getRegNum())) {
+        (RegNum.hasValue() && (RegNum != Var->getRegNum()))) {
       From = copyToReg(From, RegNum);
     }
     return From;
   }
   llvm::report_fatal_error("Unhandled operand kind in legalize()");
 
   return From;
 }
 
 /// Provide a trivial wrapper to legalize() for this common usage.
@@ skipping 46 matching lines @@
   Reg->setMustHaveReg();
   Reg->initHiLo(Func);
   Reg->getLo()->setMustNotHaveReg();
   Reg->getHi()->setMustNotHaveReg();
   return Reg;
 }
 
 Variable *TargetARM32::makeReg(Type Type, RegNumT RegNum) {
   // There aren't any 64-bit integer registers for ARM32.
   assert(Type != IceType_i64);
-  assert(AllowTemporaryWithNoReg || RegNum != RegNumT::NoRegister);
+  assert(AllowTemporaryWithNoReg || RegNum.hasValue());
   Variable *Reg = Func->makeVariable(Type);
-  if (RegNum == RegNumT::NoRegister)
+  if (RegNum.hasValue())
+    Reg->setRegNum(RegNum);
+  else
     Reg->setMustHaveReg();
-  else
-    Reg->setRegNum(RegNum);
   return Reg;
 }
 
 void TargetARM32::alignRegisterPow2(Variable *Reg, uint32_t Align,
                                     RegNumT TmpRegNum) {
   assert(llvm::isPowerOf2_32(Align));
   uint32_t RotateAmt;
   uint32_t Immed_8;
   Operand *Mask;
   // Use AND or BIC to mask off the bits, depending on which immediate fits (if
@@ skipping 766 matching lines @@
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
 llvm::SmallBitVector
     TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 
 } // end of namespace ARM32
 } // end of namespace Ice