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| 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// | 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 97 unsigned IsFP64 : 1; | 97 unsigned IsFP64 : 1; |
| 98 unsigned IsVec128 : 1; | 98 unsigned IsVec128 : 1; |
| 99 #define NUM_ALIASES_BITS 3 | 99 #define NUM_ALIASES_BITS 3 |
| 100 SizeT NumAliases : (NUM_ALIASES_BITS + 1); | 100 SizeT NumAliases : (NUM_ALIASES_BITS + 1); |
| 101 uint16_t Aliases[1 << NUM_ALIASES_BITS]; | 101 uint16_t Aliases[1 << NUM_ALIASES_BITS]; |
| 102 #undef NUM_ALIASES_BITS | 102 #undef NUM_ALIASES_BITS |
| 103 } RegTable[Reg_NUM]; | 103 } RegTable[Reg_NUM]; |
| 104 | 104 |
| 105 static inline void assertValidRegNum(RegNumT RegNum) { | 105 static inline void assertValidRegNum(RegNumT RegNum) { |
| 106 (void)RegNum; | 106 (void)RegNum; |
| 107 assert(RegNum != RegNumT::NoRegister); | 107 assert(RegNum.hasValue()); |
| 108 } | 108 } |
| 109 | 109 |
| 110 static inline bool isGPRegister(RegNumT RegNum) { | 110 static inline bool isGPRegister(RegNumT RegNum) { |
| 111 RegNum.assertIsValid(); | 111 RegNum.assertIsValid(); |
| 112 return RegTable[RegNum].IsGPR; | 112 return RegTable[RegNum].IsGPR; |
| 113 } | 113 } |
| 114 | 114 |
| 115 static constexpr inline SizeT getNumGPRegs() { | 115 static constexpr inline SizeT getNumGPRegs() { |
| 116 return 0 | 116 return 0 |
| 117 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ | 117 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ |
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| 217 RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S | 217 RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S |
| 218 // registers. | 218 // registers. |
| 219 RCARM32_NUM | 219 RCARM32_NUM |
| 220 }; | 220 }; |
| 221 | 221 |
| 222 } // end of namespace RegARM32 | 222 } // end of namespace RegARM32 |
| 223 } // end of namespace ARM32 | 223 } // end of namespace ARM32 |
| 224 } // end of namespace Ice | 224 } // end of namespace Ice |
| 225 | 225 |
| 226 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H | 226 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H |
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