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Side by Side Diff: src/IceInstX86BaseImpl.h

Issue 1691193002: Subzero: Prototype to make use of RegNumT::No Register more concise (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: changes suggested by stichnot Created 4 years, 10 months ago
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1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=// 1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1980 Ostream &Str = Func->getContext()->getStrEmit(); 1980 Ostream &Str = Func->getContext()->getStrEmit();
1981 assert(this->getSrcSize() == 1); 1981 assert(this->getSrcSize() == 1);
1982 assert(this->getDest()->hasReg()); 1982 assert(this->getDest()->hasReg());
1983 Str << "\t" 1983 Str << "\t"
1984 "lea" << this->getWidthString(this->getDest()->getType()) << "\t"; 1984 "lea" << this->getWidthString(this->getDest()->getType()) << "\t";
1985 Operand *Src0 = this->getSrc(0); 1985 Operand *Src0 = this->getSrc(0);
1986 if (const auto *Src0Var = llvm::dyn_cast<Variable>(Src0)) { 1986 if (const auto *Src0Var = llvm::dyn_cast<Variable>(Src0)) {
1987 Type Ty = Src0Var->getType(); 1987 Type Ty = Src0Var->getType();
1988 // lea on x86-32 doesn't accept mem128 operands, so cast VSrc0 to an 1988 // lea on x86-32 doesn't accept mem128 operands, so cast VSrc0 to an
1989 // acceptable type. 1989 // acceptable type.
1990 Src0Var->asType(isVectorType(Ty) ? IceType_i32 : Ty, RegNumT::NoRegister) 1990 Src0Var->asType(isVectorType(Ty) ? IceType_i32 : Ty, RegNumT())->emit(Func);
1991 ->emit(Func);
1992 } else { 1991 } else {
1993 Src0->emit(Func); 1992 Src0->emit(Func);
1994 } 1993 }
1995 Str << ", "; 1994 Str << ", ";
1996 this->getDest()->emit(Func); 1995 this->getDest()->emit(Func);
1997 } 1996 }
1998 1997
1999 template <typename TraitsType> 1998 template <typename TraitsType>
2000 void InstImpl<TraitsType>::InstX86Mov::emit(const Cfg *Func) const { 1999 void InstImpl<TraitsType>::InstX86Mov::emit(const Cfg *Func) const {
2001 if (!BuildDefs::dump()) 2000 if (!BuildDefs::dump())
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2018 } 2017 }
2019 // For an integer truncation operation, src is wider than dest. In this case, 2018 // For an integer truncation operation, src is wider than dest. In this case,
2020 // we use a mov instruction whose data width matches the narrower dest. 2019 // we use a mov instruction whose data width matches the narrower dest.
2021 // TODO: This assert disallows usages such as copying a floating 2020 // TODO: This assert disallows usages such as copying a floating
2022 // point value between a vector and a scalar (which movss is used for). Clean 2021 // point value between a vector and a scalar (which movss is used for). Clean
2023 // this up. 2022 // this up.
2024 assert(InstX86Base::getTarget(Func)->typeWidthInBytesOnStack(DestTy) == 2023 assert(InstX86Base::getTarget(Func)->typeWidthInBytesOnStack(DestTy) ==
2025 InstX86Base::getTarget(Func)->typeWidthInBytesOnStack(SrcTy)); 2024 InstX86Base::getTarget(Func)->typeWidthInBytesOnStack(SrcTy));
2026 const Operand *NewSrc = Src; 2025 const Operand *NewSrc = Src;
2027 if (auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { 2026 if (auto *SrcVar = llvm::dyn_cast<Variable>(Src)) {
2028 auto NewRegNum = RegNumT::NoRegister; 2027 RegNumT NewRegNum;
2029 if (SrcVar->hasReg()) 2028 if (SrcVar->hasReg())
2030 NewRegNum = Traits::getGprForType(DestTy, SrcVar->getRegNum()); 2029 NewRegNum = Traits::getGprForType(DestTy, SrcVar->getRegNum());
2031 if (SrcTy != DestTy) 2030 if (SrcTy != DestTy)
2032 NewSrc = SrcVar->asType(DestTy, NewRegNum); 2031 NewSrc = SrcVar->asType(DestTy, NewRegNum);
2033 } 2032 }
2034 NewSrc->emit(Func); 2033 NewSrc->emit(Func);
2035 Str << ", "; 2034 Str << ", ";
2036 this->getDest()->emit(Func); 2035 this->getDest()->emit(Func);
2037 } 2036 }
2038 2037
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2889 return; 2888 return;
2890 Ostream &Str = Func->getContext()->getStrDump(); 2889 Ostream &Str = Func->getContext()->getStrDump();
2891 Str << "IACA_END"; 2890 Str << "IACA_END";
2892 } 2891 }
2893 2892
2894 } // end of namespace X86NAMESPACE 2893 } // end of namespace X86NAMESPACE
2895 2894
2896 } // end of namespace Ice 2895 } // end of namespace Ice
2897 2896
2898 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H 2897 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H
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