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Unified Diff: tests_lit/llvm2ice_tests/large_stack_offs.ll

Issue 1687553002: Change all ARM calls into indirect calls. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 4 years, 10 months ago
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Index: tests_lit/llvm2ice_tests/large_stack_offs.ll
diff --git a/tests_lit/llvm2ice_tests/large_stack_offs.ll b/tests_lit/llvm2ice_tests/large_stack_offs.ll
index 8449df7b9a6683090b844beee97b37ea39906ad9..5b00528cc180849af8b8ade65aa6930f843662a6 100644
--- a/tests_lit/llvm2ice_tests/large_stack_offs.ll
+++ b/tests_lit/llvm2ice_tests/large_stack_offs.ll
@@ -7,7 +7,7 @@
; RUN: %if --need=target_ARM32 --need=allow_dump \
; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \
-; RUN: -i %s --args -Om1 --skip-unimplemented --test-stack-extra 4096 \
+; RUN: -i %s --args -Om1 --test-stack-extra 4096 \
; RUN: -allow-externally-defined-symbols \
; RUN: | %if --need=target_ARM32 --need=allow_dump \
; RUN: --command FileCheck --check-prefix ARM32 %s
@@ -63,12 +63,16 @@ end:
; Now skip ahead to where the call in br_1 begins, to check how %t2 is used.
; ARM32: movw ip, #4232
; ARM32-NEXT: add ip, sp, ip
+; ARM32: movw [[CALL:r[0-9]]], {{.+}} dummy
+; ARM32: movt [[CALL]]
; ARM32: ldr r2, [ip, #-4]
-; ARM32: bl {{.*}} dummy
+; ARM32: blx [[CALL]]
; The call clobbers ip, so we need to re-create the base register.
; ARM32: movw ip, #4{{.*}}
; ARM32: b {{[a-f0-9]+}}
-; ARM32: bl {{.*}} dummy
+; ARM32: movw [[CALL:r[0-9]]], {{.+}} dummy
+; ARM32: movt [[CALL]]
+; ARM32: blx [[CALL]]
; Similar, but test a function that uses FP as the base register (originally).
define internal i64 @usesFrameReg(i32 %a, i32 %b, i32 %c, i32 %d) {
@@ -118,9 +122,13 @@ end:
; Now skip ahead to where the call in br_1 begins, to check how %t2 is used.
; ARM32: movw ip, #4120
; ARM32-NEXT: sub ip, fp, ip
+; ARM32: movw [[CALL:r[0-9]]], {{.+}} dummy
+; ARM32: movt [[CALL]]
; ARM32: ldr r2, [ip, #-4]
-; ARM32: bl {{.*}} dummy
+; ARM32: blx [[CALL]]
; The call clobbers ip, so we need to re-create the base register.
; ARM32: movw ip, #4{{.*}}
; ARM32: b {{[a-f0-9]+}}
-; ARM32: bl {{.*}} dummy
+; ARM32: movw [[CALL:r[0-9]]], {{.+}} dummy
+; ARM32: movt [[CALL]]
+; ARM32: blx [[CALL]]
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