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Side by Side Diff: tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll

Issue 1687553002: Change all ARM calls into indirect calls. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 4 years, 10 months ago
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1 ; This tests the NaCl intrinsics not related to atomic operations. 1 ; This tests the NaCl intrinsics not related to atomic operations.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 --sandbox -i %s --args -O2 \ 4 ; RUN: --target x8632 --sandbox -i %s --args -O2 \
5 ; RUN: -allow-externally-defined-symbols \ 5 ; RUN: -allow-externally-defined-symbols \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
8 ; RUN: --target x8632 --sandbox -i %s --args -Om1 \ 8 ; RUN: --target x8632 --sandbox -i %s --args -Om1 \
9 ; RUN: -allow-externally-defined-symbols \ 9 ; RUN: -allow-externally-defined-symbols \
10 ; RUN: | %if --need=target_X8632 --command FileCheck %s 10 ; RUN: | %if --need=target_X8632 --command FileCheck %s
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122 NonZero: 122 NonZero:
123 ret i32 1 123 ret i32 1
124 } 124 }
125 ; CHECK-LABEL: test_setjmplongjmp 125 ; CHECK-LABEL: test_setjmplongjmp
126 ; CHECK: call {{.*}} R_{{.*}} setjmp 126 ; CHECK: call {{.*}} R_{{.*}} setjmp
127 ; CHECK: call {{.*}} R_{{.*}} longjmp 127 ; CHECK: call {{.*}} R_{{.*}} longjmp
128 ; CHECKO2REM-LABEL: test_setjmplongjmp 128 ; CHECKO2REM-LABEL: test_setjmplongjmp
129 ; CHECKO2REM: call {{.*}} R_{{.*}} setjmp 129 ; CHECKO2REM: call {{.*}} R_{{.*}} setjmp
130 ; CHECKO2REM: call {{.*}} R_{{.*}} longjmp 130 ; CHECKO2REM: call {{.*}} R_{{.*}} longjmp
131 ; ARM32-LABEL: test_setjmplongjmp 131 ; ARM32-LABEL: test_setjmplongjmp
132 ; ARM32: bl {{.*}} setjmp 132 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} setjmp
133 ; ARM32: bl {{.*}} longjmp 133 ; ARM32: movt [[CALL]]
134 ; ARM32: blx [[CALL]]
135 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} longjmp
136 ; ARM32: movt [[CALL]]
137 ; ARM32: blx [[CALL]]
134 138
135 define internal i32 @test_setjmp_unused(i32 %iptr_env, i32 %i_other) { 139 define internal i32 @test_setjmp_unused(i32 %iptr_env, i32 %i_other) {
136 entry: 140 entry:
137 %env = inttoptr i32 %iptr_env to i8* 141 %env = inttoptr i32 %iptr_env to i8*
138 %i = call i32 @llvm.nacl.setjmp(i8* %env) 142 %i = call i32 @llvm.nacl.setjmp(i8* %env)
139 ret i32 %i_other 143 ret i32 %i_other
140 } 144 }
141 ; Don't consider setjmp side-effect free, so it's not eliminated if 145 ; Don't consider setjmp side-effect free, so it's not eliminated if
142 ; result unused. 146 ; result unused.
143 ; CHECKO2REM-LABEL: test_setjmp_unused 147 ; CHECKO2REM-LABEL: test_setjmp_unused
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464 ; ARM32: mov {{.*}}, #0 468 ; ARM32: mov {{.*}}, #0
465 469
466 define internal i32 @test_popcount_32(i32 %x) { 470 define internal i32 @test_popcount_32(i32 %x) {
467 entry: 471 entry:
468 %r = call i32 @llvm.ctpop.i32(i32 %x) 472 %r = call i32 @llvm.ctpop.i32(i32 %x)
469 ret i32 %r 473 ret i32 %r
470 } 474 }
471 ; CHECK-LABEL: test_popcount_32 475 ; CHECK-LABEL: test_popcount_32
472 ; CHECK: call {{.*}} R_{{.*}} __popcountsi2 476 ; CHECK: call {{.*}} R_{{.*}} __popcountsi2
473 ; ARM32-LABEL: test_popcount_32 477 ; ARM32-LABEL: test_popcount_32
474 ; ARM32: bl {{.*}} __popcountsi2 478 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __popcountsi2
479 ; ARM32: movt [[CALL]]
480 ; ARM32: blx [[CALL]]
475 481
476 define internal i64 @test_popcount_64(i64 %x) { 482 define internal i64 @test_popcount_64(i64 %x) {
477 entry: 483 entry:
478 %r = call i64 @llvm.ctpop.i64(i64 %x) 484 %r = call i64 @llvm.ctpop.i64(i64 %x)
479 ret i64 %r 485 ret i64 %r
480 } 486 }
481 ; CHECK-LABEL: test_popcount_64 487 ; CHECK-LABEL: test_popcount_64
482 ; CHECK: call {{.*}} R_{{.*}} __popcountdi2 488 ; CHECK: call {{.*}} R_{{.*}} __popcountdi2
483 ; __popcountdi2 only returns a 32-bit result, so clear the upper bits of 489 ; __popcountdi2 only returns a 32-bit result, so clear the upper bits of
484 ; the return value just in case. 490 ; the return value just in case.
485 ; CHECK: mov {{.*}},0x0 491 ; CHECK: mov {{.*}},0x0
486 ; ARM32-LABEL: test_popcount_64 492 ; ARM32-LABEL: test_popcount_64
487 ; ARM32: bl {{.*}} __popcountdi2 493 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __popcountdi2
494 ; ARM32: movt [[CALL]]
495 ; ARM32: blx [[CALL]]
488 ; ARM32: mov {{.*}}, #0 496 ; ARM32: mov {{.*}}, #0
489 497
490 define internal i32 @test_popcount_64_ret_i32(i64 %x) { 498 define internal i32 @test_popcount_64_ret_i32(i64 %x) {
491 entry: 499 entry:
492 %r_i64 = call i64 @llvm.ctpop.i64(i64 %x) 500 %r_i64 = call i64 @llvm.ctpop.i64(i64 %x)
493 %r = trunc i64 %r_i64 to i32 501 %r = trunc i64 %r_i64 to i32
494 ret i32 %r 502 ret i32 %r
495 } 503 }
496 ; If there is a trunc, then the mov {{.*}}, 0 is dead and gets optimized out. 504 ; If there is a trunc, then the mov {{.*}}, 0 is dead and gets optimized out.
497 ; CHECKO2REM-LABEL: test_popcount_64_ret_i32 505 ; CHECKO2REM-LABEL: test_popcount_64_ret_i32
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547 ; CHECK: lea {{.*}},[esp+0x10] 555 ; CHECK: lea {{.*}},[esp+0x10]
548 ; CHECK: lea {{.*}},[esp+0x10] 556 ; CHECK: lea {{.*}},[esp+0x10]
549 ; CHECK: call 557 ; CHECK: call
550 ; CHECK: mov esp,{{.*}} 558 ; CHECK: mov esp,{{.*}}
551 ; CHECK: mov esp,ebp 559 ; CHECK: mov esp,ebp
552 ; ARM32-LABEL: test_stacksave_multiple 560 ; ARM32-LABEL: test_stacksave_multiple
553 ; ARM32: mov {{.*}}, sp 561 ; ARM32: mov {{.*}}, sp
554 ; ARM32: mov {{.*}}, sp 562 ; ARM32: mov {{.*}}, sp
555 ; ARM32: mov {{.*}}, sp 563 ; ARM32: mov {{.*}}, sp
556 ; ARM32: mov sp, {{.*}} 564 ; ARM32: mov sp, {{.*}}
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