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Issue 1687553002: Change all ARM calls into indirect calls. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 4 years, 10 months ago
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1 ; Assembly test for simple arithmetic operations. 1 ; Assembly test for simple arithmetic operations.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 \ 4 ; RUN: --target x8632 -i %s --args -O2 \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
8 ; once enough infrastructure is in. Also, switch to --filetype=obj
9 ; when possible.
10 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 7 ; RUN: %if --need=target_ARM32 --need=allow_dump \
11 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 8 ; RUN: --command %p2i --filetype=obj --assemble --disassemble --target arm32 \
12 ; RUN: -i %s --args -O2 --skip-unimplemented \ 9 ; RUN: -i %s --args -O2 \
13 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 10 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
14 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM-OPT2 %s 11 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM-OPT2 %s
15 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 12 ; RUN: %if --need=target_ARM32 --need=allow_dump \
16 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 13 ; RUN: --command %p2i --filetype=obj --assemble --disassemble --target arm32 \
17 ; RUN: -i %s --args -O2 --mattr=hwdiv-arm --skip-unimplemented \ 14 ; RUN: -i %s --args -O2 --mattr=hwdiv-arm \
18 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 15 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
19 ; RUN: --command FileCheck --check-prefix ARM32HWDIV %s 16 ; RUN: --command FileCheck --check-prefix ARM32HWDIV %s
20 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 17 ; RUN: %if --need=target_ARM32 --need=allow_dump \
21 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ 18 ; RUN: --command %p2i --filetype=obj --assemble --disassemble --target arm32 \
22 ; RUN: -i %s --args -Om1 --skip-unimplemented \ 19 ; RUN: -i %s --args -Om1 \
23 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 20 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
24 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OPTM1 %s 21 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix ARM32-OPTM1 %s
25 ; 22 ;
23 ; TODO(kschimpf): Stop skipping unimplemented parts (via --skip-unimplemented)
24 ; once enough infrastructure is in. Also, switch to --filetype=obj
25 ; when possible.
26 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ 26 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
27 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\ 27 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\
28 ; RUN: -i %s --args -O2 --skip-unimplemented \ 28 ; RUN: -i %s --args -O2 -skip-unimplemented \
29 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 29 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
30 ; RUN: --command FileCheck --check-prefix MIPS32 %s 30 ; RUN: --command FileCheck --check-prefix MIPS32 %s
31 31
32 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ 32 ; RUN: %if --need=target_MIPS32 --need=allow_dump \
33 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\ 33 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\
34 ; RUN: -i %s --args -Om1 --skip-unimplemented \ 34 ; RUN: -i %s --args -Om1 --skip-unimplemented \
35 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 35 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \
36 ; RUN: --command FileCheck --check-prefix MIPS32 %s 36 ; RUN: --command FileCheck --check-prefix MIPS32 %s
37 37
38 define internal i32 @Add(i32 %a, i32 %b) { 38 define internal i32 @Add(i32 %a, i32 %b) {
(...skipping 116 matching lines...) Expand 10 before | Expand all | Expand 10 after
155 %div = sdiv i32 %a, %b 155 %div = sdiv i32 %a, %b
156 ret i32 %div 156 ret i32 %div
157 } 157 }
158 ; CHECK-LABEL: Sdiv 158 ; CHECK-LABEL: Sdiv
159 ; CHECK: cdq 159 ; CHECK: cdq
160 ; CHECK: idiv e 160 ; CHECK: idiv e
161 ; 161 ;
162 ; ARM32-LABEL: Sdiv 162 ; ARM32-LABEL: Sdiv
163 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] 163 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
164 ; ARM32: bne 164 ; ARM32: bne
165 ; ARM32: .word 0xe7fedef0 165 ; AARM32: .word 0xe7fedef0
166 ; ARM32: {{.*}} bl {{.*}} __divsi3 166 ; ARM32: udf #60896 ; 0xede0
167 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __divsi3
168 ; ARM32: movt [[CALL]], {{.+}} __divsi3
169 ; ARM32: blx [[CALL]]
167 ; ARM32HWDIV-LABEL: Sdiv 170 ; ARM32HWDIV-LABEL: Sdiv
168 ; ARM32HWDIV: tst 171 ; ARM32HWDIV: tst
169 ; ARM32HWDIV: bne 172 ; ARM32HWDIV: bne
170 ; ARM32HWDIV: sdiv 173 ; ARM32HWDIV: sdiv
171 174
172 ; MIPS32-LABEL: Sdiv 175 ; MIPS32-LABEL: Sdiv
173 176
174 define internal i32 @SdivConst(i32 %a) { 177 define internal i32 @SdivConst(i32 %a) {
175 entry: 178 entry:
176 %div = sdiv i32 %a, 219 179 %div = sdiv i32 %a, 219
177 ret i32 %div 180 ret i32 %div
178 } 181 }
179 ; CHECK-LABEL: SdivConst 182 ; CHECK-LABEL: SdivConst
180 ; CHECK: cdq 183 ; CHECK: cdq
181 ; CHECK: idiv e 184 ; CHECK: idiv e
182 ; 185 ;
183 ; ARM32-LABEL: SdivConst 186 ; ARM32-LABEL: SdivConst
184 ; ARM32-NOT: tst 187 ; ARM32-NOT: tst
185 ; ARM32: bl {{.*}} __divsi3 188 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __divsi3
189 ; ARM32: movt [[CALL]], {{.+}} __divsi3
190 ; ARM32: blx [[CALL]]
186 ; ARM32HWDIV-LABEL: SdivConst 191 ; ARM32HWDIV-LABEL: SdivConst
187 ; ARM32HWDIV-NOT: tst 192 ; ARM32HWDIV-NOT: tst
188 ; ARM32HWDIV: sdiv 193 ; ARM32HWDIV: sdiv
189 194
190 ; MIPS32-LABEL: SdivConst 195 ; MIPS32-LABEL: SdivConst
191 196
192 define internal i32 @Srem(i32 %a, i32 %b) { 197 define internal i32 @Srem(i32 %a, i32 %b) {
193 entry: 198 entry:
194 %rem = srem i32 %a, %b 199 %rem = srem i32 %a, %b
195 ret i32 %rem 200 ret i32 %rem
196 } 201 }
197 ; CHECK-LABEL: Srem 202 ; CHECK-LABEL: Srem
198 ; CHECK: cdq 203 ; CHECK: cdq
199 ; CHECK: idiv e 204 ; CHECK: idiv e
200 ; 205 ;
201 ; ARM32-LABEL: Srem 206 ; ARM32-LABEL: Srem
202 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] 207 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
203 ; ARM32: bne 208 ; ARM32: bne
204 ; ARM32: bl {{.*}} __modsi3 209 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __modsi3
210 ; ARM32: movt [[CALL]], {{.+}} __modsi3
211 ; ARM32: blx [[CALL]]
205 ; ARM32HWDIV-LABEL: Srem 212 ; ARM32HWDIV-LABEL: Srem
206 ; ARM32HWDIV: tst 213 ; ARM32HWDIV: tst
207 ; ARM32HWDIV: bne 214 ; ARM32HWDIV: bne
208 ; ARM32HWDIV: sdiv 215 ; ARM32HWDIV: sdiv
209 ; ARM32HWDIV: mls 216 ; ARM32HWDIV: mls
210 217
211 ; MIPS32-LABEL: Srem 218 ; MIPS32-LABEL: Srem
212 219
213 define internal i32 @Udiv(i32 %a, i32 %b) { 220 define internal i32 @Udiv(i32 %a, i32 %b) {
214 entry: 221 entry:
215 %div = udiv i32 %a, %b 222 %div = udiv i32 %a, %b
216 ret i32 %div 223 ret i32 %div
217 } 224 }
218 ; CHECK-LABEL: Udiv 225 ; CHECK-LABEL: Udiv
219 ; CHECK: div e 226 ; CHECK: div e
220 ; 227 ;
221 ; ARM32-LABEL: Udiv 228 ; ARM32-LABEL: Udiv
222 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] 229 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
223 ; ARM32: bne 230 ; ARM32: bne
224 ; ARM32: bl {{.*}} __udivsi3 231 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __udivsi3
232 ; ARM32: movt [[CALL]], {{.+}} __udivsi3
233 ; ARM32: blx [[CALL]]
225 ; ARM32HWDIV-LABEL: Udiv 234 ; ARM32HWDIV-LABEL: Udiv
226 ; ARM32HWDIV: tst 235 ; ARM32HWDIV: tst
227 ; ARM32HWDIV: bne 236 ; ARM32HWDIV: bne
228 ; ARM32HWDIV: udiv 237 ; ARM32HWDIV: udiv
229 238
230 ; MIPS32-LABEL: Udiv 239 ; MIPS32-LABEL: Udiv
231 240
232 define internal i32 @Urem(i32 %a, i32 %b) { 241 define internal i32 @Urem(i32 %a, i32 %b) {
233 entry: 242 entry:
234 %rem = urem i32 %a, %b 243 %rem = urem i32 %a, %b
235 ret i32 %rem 244 ret i32 %rem
236 } 245 }
237 ; CHECK-LABEL: Urem 246 ; CHECK-LABEL: Urem
238 ; CHECK: div e 247 ; CHECK: div e
239 ; 248 ;
240 ; ARM32-LABEL: Urem 249 ; ARM32-LABEL: Urem
241 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] 250 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
242 ; ARM32: bne 251 ; ARM32: bne
243 ; ARM32: bl {{.*}} __umodsi3 252 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __umodsi3
253 ; ARM32: movt [[CALL]], {{.+}} __umodsi3
254 ; ARM32: blx [[CALL]]
244 ; ARM32HWDIV-LABEL: Urem 255 ; ARM32HWDIV-LABEL: Urem
245 ; ARM32HWDIV: tst 256 ; ARM32HWDIV: tst
246 ; ARM32HWDIV: bne 257 ; ARM32HWDIV: bne
247 ; ARM32HWDIV: udiv 258 ; ARM32HWDIV: udiv
248 ; ARM32HWDIV: mls 259 ; ARM32HWDIV: mls
249 260
250 ; MIPS32-LABEL: Urem 261 ; MIPS32-LABEL: Urem
251 262
252 ; The following tests check that shift instructions don't try to use a 263 ; The following tests check that shift instructions don't try to use a
253 ; ConstantRelocatable as an immediate operand. 264 ; ConstantRelocatable as an immediate operand.
(...skipping 19 matching lines...) Expand all
273 ; CHECK: shr {{.*}},cl 284 ; CHECK: shr {{.*}},cl
274 285
275 define internal i32 @AshrReloc(i32 %a) { 286 define internal i32 @AshrReloc(i32 %a) {
276 entry: 287 entry:
277 %opnd = ptrtoint [4 x i8]* @G to i32 288 %opnd = ptrtoint [4 x i8]* @G to i32
278 %result = ashr i32 %a, %opnd 289 %result = ashr i32 %a, %opnd
279 ret i32 %result 290 ret i32 %result
280 } 291 }
281 ; CHECK-LABEL: AshrReloc 292 ; CHECK-LABEL: AshrReloc
282 ; CHECK: sar {{.*}},cl 293 ; CHECK: sar {{.*}},cl
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