Sk4f: add floor()

src/opts/SkNx_neon.h

 /*
  * Copyright 2015 Google Inc.
  *
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
 
 #ifndef SkNx_neon_DEFINED
 #define SkNx_neon_DEFINED
 
 #define SKNX_IS_FAST
 
+// ARMv8 has vrndmq_f32 to floor 4 floats.  Here we emulate it:
+//   - round by adding (1<<23) with our sign, then subtracting it;
+//   - if that rounded value is bigger than our input, subtract 1.
+static inline float32x4_t armv7_vrndmq_f32(float32x4_t v) {
+    auto sign = vandq_u32((uint32x4_t)v, vdupq_n_u32(1<<31));
+    auto bias = (float32x4_t)(vorrq_u32((uint32x4_t)vdupq_n_f32(1<<23), sign));
+    auto rounded = vsubq_f32(vaddq_f32(v, bias), bias);
+    auto too_big = vcgtq_f32(rounded, v);
+    return vsubq_f32(rounded, (float32x4_t)vandq_u32(too_big, (uint32x4_t)vdupq_n_f32(1)));
+}
+
 // Well, this is absurd.  The shifts require compile-time constant arguments.
 
 #define SHIFT8(op, v, bits) switch(bits) { \
     case  1: return op(v,  1);  case  2: return op(v,  2);  case  3: return op(v,  3); \
     case  4: return op(v,  4);  case  5: return op(v,  5);  case  6: return op(v,  6); \
     case  7: return op(v,  7); \
     } return fVec
 
 #define SHIFT16(op, v, bits) if (bits < 8) { SHIFT8(op, v, bits); } switch(bits) { \
                                 case  8: return op(v,  8);  case  9: return op(v,  9); \
@@ skipping 131 matching lines @@
     SkNx operator<=(const SkNx& o) const { return vreinterpretq_f32_u32(vcleq_f32(fVec, o.fVec)); }
     SkNx operator>=(const SkNx& o) const { return vreinterpretq_f32_u32(vcgeq_f32(fVec, o.fVec)); }
     SkNx operator!=(const SkNx& o) const {
         return vreinterpretq_f32_u32(vmvnq_u32(vceqq_f32(fVec, o.fVec)));
     }
 
     static SkNx Min(const SkNx& l, const SkNx& r) { return vminq_f32(l.fVec, r.fVec); }
     static SkNx Max(const SkNx& l, const SkNx& r) { return vmaxq_f32(l.fVec, r.fVec); }
 
     SkNx abs() const { return vabsq_f32(fVec); }
+    SkNx floor() const {
+    #if defined(SK_CPU_ARM64)
+        return vrndmq_f32(fVec);
+    #else
+        return armv7_vrndmq_f32(fVec);
+    #endif
+    }
+
 
     SkNx rsqrt0() const { return vrsqrteq_f32(fVec); }
     SkNx rsqrt1() const {
         float32x4_t est0 = this->rsqrt0().fVec;
         return vmulq_f32(vrsqrtsq_f32(fVec, vmulq_f32(est0, est0)), est0);
     }
     SkNx rsqrt2() const {
         float32x4_t est1 = this->rsqrt1().fVec;
         return vmulq_f32(vrsqrtsq_f32(fVec, vmulq_f32(est1, est1)), est1);
     }
@@ skipping 195 matching lines @@
 
 template<> inline Sk4h SkNx_cast<uint16_t, uint8_t>(const Sk4b& src) {
     return vget_low_u16(vmovl_u8(src.fVec));
 }
 
 template<> inline Sk4b SkNx_cast<uint8_t, uint16_t>(const Sk4h& src) {
     return vmovn_u16(vcombine_u16(src.fVec, src.fVec));
 }
 
 #endif//SkNx_neon_DEFINED