ARM32 vector lowering: fabs, scalarize remaining arithmetic operations.

tests_lit/assembler/arm32/vabs.ll

Index: tests_lit/assembler/arm32/vabs.ll
diff --git a/tests_lit/assembler/arm32/vabs.ll b/tests_lit/assembler/arm32/vabs.ll
index 695e3567745ec0286ebe09f2bedb7431bdc56634..c39e87ab4bf68922e81a94b568136d8db0e7b4c2 100644
--- a/tests_lit/assembler/arm32/vabs.ll
+++ b/tests_lit/assembler/arm32/vabs.ll
@@ -1,4 +1,5 @@
-; Show that we translate intrinsics for fabs on float and double.
+; Show that we translate intrinsics for fabs on float, double and

[Jim Stichnoth, 2016/02/17 20:59:51]

reflow comment to 80-col
(unless that was meant to be a non-breaking space)

[Eric Holk, 2016/02/17 22:31:56]

Done.

+; float vectors.
 
 ; REQUIRES: allow_dump
 
@@ -26,6 +27,7 @@
 
 declare float @llvm.fabs.f32(float)
 declare double @llvm.fabs.f64(double)
+declare <4 x float> @llvm.fabs.v4f32(<4 x float>)
 
 define internal float @test_fabs_float(float %x) {
 ; ASM-LABEL: test_fabs_float:
@@ -56,3 +58,18 @@ entry:
 
   ret double %r
 }
+
+define internal <4 x float> @test_fabs_4float(<4 x float> %x) {
+; ASM-LABEL: test_fabs_4float:
+; DIS-LABEL: 00000050 <test_fabs_4float>:
+; IASM-LABEL: test_fabs_4float:
+
+entry:
+  %r = call <4 x float> @llvm.fabs.v4f32(<4 x float> %x)
+
+; ASM:  vabs.f32        q0, q0
+; DIS:   60:    f3b90740
+; IASM-NOT: vabs.f32
+
+  ret <4 x float> %r
+}