libvpx: Pull from upstream

source/libvpx/vp9/common/mips/dspr2/vp9_itrans16_dspr2.c

 /*
  *  Copyright (c) 2013 The WebM project authors. All Rights Reserved.
  *
  *  Use of this source code is governed by a BSD-style license
  *  that can be found in the LICENSE file in the root of the source
  *  tree. An additional intellectual property rights grant can be found
  *  in the file PATENTS.  All contributing project authors may
  *  be found in the AUTHORS file in the root of the source tree.
  */
 
 #include <assert.h>
 #include <stdio.h>
 
 #include "./vpx_config.h"
 #include "./vp9_rtcd.h"
 #include "vp9/common/vp9_common.h"
 #include "vp9/common/vp9_blockd.h"
 #include "vp9/common/vp9_idct.h"
 #include "vp9/common/mips/dspr2/vp9_common_dspr2.h"
 
 #if HAVE_DSPR2
-static void idct16_1d_rows_dspr2(const int16_t *input, int16_t *output,
-                                 uint32_t no_rows) {
+static void idct16_rows_dspr2(const int16_t *input, int16_t *output,
+                              uint32_t no_rows) {
   int i;
   int step1_0, step1_1, step1_2, step1_3, step1_4, step1_5, step1_6, step1_7;
   int step1_10, step1_11, step1_12, step1_13;
   int step2_0, step2_1, step2_2, step2_3;
   int step2_8, step2_9, step2_10, step2_11;
   int step2_12, step2_13, step2_14, step2_15;
   int load1, load2, load3, load4, load5, load6, load7, load8;
   int result1, result2, result3, result4;
   const int const_2_power_13 = 8192;
 
@@ skipping 363 matching lines @@
           [step1_4] "r" (step1_4), [step1_5] "r" (step1_5),
           [step1_10] "r" (step1_10), [step1_11] "r" (step1_11),
           [step1_12] "r" (step1_12), [step1_13] "r" (step1_13)
     );
 
     input += 16;
     output += 1;
   }
 }
 
-static void idct16_1d_cols_add_blk_dspr2(int16_t *input, uint8_t *dest,
-                                         int dest_stride) {
+static void idct16_cols_add_blk_dspr2(int16_t *input, uint8_t *dest,
+                                      int dest_stride) {
   int i;
   int step1_0, step1_1, step1_2, step1_3, step1_4, step1_5, step1_6, step1_7;
   int step1_8, step1_9, step1_10, step1_11;
   int step1_12, step1_13, step1_14, step1_15;
   int step2_0, step2_1, step2_2, step2_3;
   int step2_8, step2_9, step2_10, step2_11;
   int step2_12, step2_13, step2_14, step2_15;
   int load1, load2, load3, load4, load5, load6, load7, load8;
   int result1, result2, result3, result4;
   const int const_2_power_13 = 8192;
@@ skipping 479 matching lines @@
   uint32_t pos = 45;
 
   /* bit positon for extract from acc */
   __asm__ __volatile__ (
     "wrdsp    %[pos],    1    \n\t"
     :
     : [pos] "r" (pos)
   );
 
   // First transform rows
-  idct16_1d_rows_dspr2(input, out, 16);
+  idct16_rows_dspr2(input, out, 16);
 
   // Then transform columns and add to dest
-  idct16_1d_cols_add_blk_dspr2(out, dest, dest_stride);
+  idct16_cols_add_blk_dspr2(out, dest, dest_stride);
 }
 
-static void iadst16_1d(const int16_t *input, int16_t *output) {
+static void iadst16(const int16_t *input, int16_t *output) {
   int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15;
 
   int x0 = input[15];
   int x1 = input[0];
   int x2 = input[13];
   int x3 = input[2];
   int x4 = input[11];
   int x5 = input[4];
   int x6 = input[9];
   int x7 = input[6];
@@ skipping 167 matching lines @@
 
   /* bit positon for extract from acc */
   __asm__ __volatile__ (
     "wrdsp    %[pos],    1    \n\t"
     :
     : [pos] "r" (pos)
   );
 
   switch (tx_type) {
     case DCT_DCT:     // DCT in both horizontal and vertical
-      idct16_1d_rows_dspr2(input, outptr, 16);
-      idct16_1d_cols_add_blk_dspr2(out, dest, pitch);
+      idct16_rows_dspr2(input, outptr, 16);
+      idct16_cols_add_blk_dspr2(out, dest, pitch);
       break;
     case ADST_DCT:    // ADST in vertical, DCT in horizontal
-      idct16_1d_rows_dspr2(input, outptr, 16);
+      idct16_rows_dspr2(input, outptr, 16);
 
       outptr = out;
 
       for (i = 0; i < 16; ++i) {
-        iadst16_1d(outptr, temp_out);
+        iadst16(outptr, temp_out);
 
         for (j = 0; j < 16; ++j)
           dest[j * pitch + i] =
                     clip_pixel(ROUND_POWER_OF_TWO(temp_out[j], 6)
                                       + dest[j * pitch + i]);
         outptr += 16;
       }
       break;
     case DCT_ADST:    // DCT in vertical, ADST in horizontal
     {
       int16_t temp_in[16 * 16];
 
       for (i = 0; i < 16; ++i) {
         /* prefetch row */
         vp9_prefetch_load((const uint8_t *)(input + 16));
 
-        iadst16_1d(input, outptr);
+        iadst16(input, outptr);
         input += 16;
         outptr += 16;
       }
 
       for (i = 0; i < 16; ++i)
         for (j = 0; j < 16; ++j)
             temp_in[j * 16 + i] = out[i * 16 + j];
 
-      idct16_1d_cols_add_blk_dspr2(temp_in, dest, pitch);
+      idct16_cols_add_blk_dspr2(temp_in, dest, pitch);
     }
     break;
     case ADST_ADST:   // ADST in both directions
     {
       int16_t temp_in[16];
 
       for (i = 0; i < 16; ++i) {
         /* prefetch row */
         vp9_prefetch_load((const uint8_t *)(input + 16));
 
-        iadst16_1d(input, outptr);
+        iadst16(input, outptr);
         input += 16;
         outptr += 16;
       }
 
       for (i = 0; i < 16; ++i) {
         for (j = 0; j < 16; ++j)
           temp_in[j] = out[j * 16 + i];
-        iadst16_1d(temp_in, temp_out);
+        iadst16(temp_in, temp_out);
         for (j = 0; j < 16; ++j)
           dest[j * pitch + i] =
                     clip_pixel(ROUND_POWER_OF_TWO(temp_out[j], 6)
                                       + dest[j * pitch + i]);
       }
     }
     break;
     default:
       printf("vp9_short_iht16x16_add_dspr2 : Invalid tx_type\n");
       break;
   }
 }
 
 void vp9_idct16x16_10_add_dspr2(const int16_t *input, uint8_t *dest,
                                 int dest_stride) {
   DECLARE_ALIGNED(32, int16_t,  out[16 * 16]);
   int16_t *outptr = out;
   uint32_t i;
   uint32_t pos = 45;
 
   /* bit positon for extract from acc */
   __asm__ __volatile__ (
     "wrdsp    %[pos],    1    \n\t"
     :
     : [pos] "r" (pos)
   );
 
   // First transform rows. Since all non-zero dct coefficients are in
   // upper-left 4x4 area, we only need to calculate first 4 rows here.
-  idct16_1d_rows_dspr2(input, outptr, 4);
+  idct16_rows_dspr2(input, outptr, 4);
 
   outptr += 4;
   for (i = 0; i < 6; ++i) {
     __asm__ __volatile__ (
         "sw     $zero,    0(%[outptr])     \n\t"
         "sw     $zero,   32(%[outptr])     \n\t"
         "sw     $zero,   64(%[outptr])     \n\t"
         "sw     $zero,   96(%[outptr])     \n\t"
         "sw     $zero,  128(%[outptr])     \n\t"
         "sw     $zero,  160(%[outptr])     \n\t"
         "sw     $zero,  192(%[outptr])     \n\t"
         "sw     $zero,  224(%[outptr])     \n\t"
         "sw     $zero,  256(%[outptr])     \n\t"
         "sw     $zero,  288(%[outptr])     \n\t"
         "sw     $zero,  320(%[outptr])     \n\t"
         "sw     $zero,  352(%[outptr])     \n\t"
         "sw     $zero,  384(%[outptr])     \n\t"
         "sw     $zero,  416(%[outptr])     \n\t"
         "sw     $zero,  448(%[outptr])     \n\t"
         "sw     $zero,  480(%[outptr])     \n\t"
 
         :
         : [outptr] "r" (outptr)
     );
 
     outptr += 2;
   }
 
   // Then transform columns
-  idct16_1d_cols_add_blk_dspr2(out, dest, dest_stride);
+  idct16_cols_add_blk_dspr2(out, dest, dest_stride);
 }
 
 void vp9_idct16x16_1_add_dspr2(const int16_t *input, uint8_t *dest,
                                int dest_stride) {
   uint32_t pos = 45;
   int32_t out;
   int32_t r;
   int32_t a1, absa1;
   int32_t vector_a1;
   int32_t t1, t2, t3, t4;
@@ skipping 79 matching lines @@
           : [t1] "=&r" (t1), [t2] "=&r" (t2), [t3] "=&r" (t3), [t4] "=&r" (t4),
             [vector_1] "=&r" (vector_1), [vector_2] "=&r" (vector_2),
             [vector_3] "=&r" (vector_3), [vector_4] "=&r" (vector_4),
             [dest] "+&r" (dest)
           : [dest_stride] "r" (dest_stride), [vector_a1] "r" (vector_a1)
       );
     }
   }
 }
 #endif  // #if HAVE_DSPR2