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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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568 Instr->setDeleted(); | 568 Instr->setDeleted(); |
569 return; | 569 return; |
570 } | 570 } |
571 } | 571 } |
572 llvm::report_fatal_error("Control flow should never have reached here."); | 572 llvm::report_fatal_error("Control flow should never have reached here."); |
573 } | 573 } |
574 case Inst::Cast: { | 574 case Inst::Cast: { |
575 Variable *Dest = Instr->getDest(); | 575 Variable *Dest = Instr->getDest(); |
576 Operand *Src0 = Instr->getSrc(0); | 576 Operand *Src0 = Instr->getSrc(0); |
577 const Type DestTy = Dest->getType(); | 577 const Type DestTy = Dest->getType(); |
578 const InstCast::OpKind CastKind = | 578 auto *CastInstr = llvm::cast<InstCast>(Instr); |
579 llvm::cast<InstCast>(Instr)->getCastKind(); | 579 const InstCast::OpKind CastKind = CastInstr->getCastKind(); |
| 580 |
| 581 if (isVectorType(DestTy)) { |
| 582 scalarizeUnaryInstruction(Dest, Src0, |
| 583 [this, CastKind](Variable *Dest, |
| 584 Variable *Src) { |
| 585 return Context.insert<InstCast>(CastKind, |
| 586 Dest, Src); |
| 587 }); |
| 588 CastInstr->setDeleted(); |
| 589 return; |
| 590 } |
| 591 |
580 switch (CastKind) { | 592 switch (CastKind) { |
581 default: | 593 default: |
582 return; | 594 return; |
583 case InstCast::Fptosi: | 595 case InstCast::Fptosi: |
584 case InstCast::Fptoui: { | 596 case InstCast::Fptoui: { |
585 if (DestTy != IceType_i64) { | 597 if (DestTy != IceType_i64) { |
586 return; | 598 return; |
587 } | 599 } |
588 const bool DestIsSigned = CastKind == InstCast::Fptosi; | 600 const bool DestIsSigned = CastKind == InstCast::Fptosi; |
589 const bool Src0IsF32 = isFloat32Asserting32Or64(Src0->getType()); | 601 const bool Src0IsF32 = isFloat32Asserting32Or64(Src0->getType()); |
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714 Operand *TargetHelper = Ctx->getConstantExternSym(H_call_setjmp); | 726 Operand *TargetHelper = Ctx->getConstantExternSym(H_call_setjmp); |
715 auto *Call = Context.insert<InstCall>(MaxArgs, Dest, TargetHelper, | 727 auto *Call = Context.insert<InstCall>(MaxArgs, Dest, TargetHelper, |
716 NoTailCall, IsTargetHelperCall); | 728 NoTailCall, IsTargetHelperCall); |
717 Call->addArg(IntrinsicCall->getArg(0)); | 729 Call->addArg(IntrinsicCall->getArg(0)); |
718 Instr->setDeleted(); | 730 Instr->setDeleted(); |
719 return; | 731 return; |
720 } | 732 } |
721 } | 733 } |
722 llvm::report_fatal_error("Control flow should never have reached here."); | 734 llvm::report_fatal_error("Control flow should never have reached here."); |
723 } | 735 } |
| 736 case Inst::Icmp: { |
| 737 Variable *Dest = Instr->getDest(); |
| 738 const Type DestTy = Dest->getType(); |
| 739 if (isVectorType(DestTy)) { |
| 740 auto *CmpInstr = llvm::cast<InstIcmp>(Instr); |
| 741 const auto Condition = CmpInstr->getCondition(); |
| 742 scalarizeInstruction(Dest, CmpInstr->getSrc(0), CmpInstr->getSrc(1), |
| 743 [this, Condition](Variable *Dest, Variable *Src0, |
| 744 Variable *Src1) { |
| 745 return Context.insert<InstIcmp>(Condition, Dest, |
| 746 Src0, Src1); |
| 747 }); |
| 748 CmpInstr->setDeleted(); |
| 749 } |
| 750 return; |
| 751 } |
| 752 case Inst::Fcmp: { |
| 753 Variable *Dest = Instr->getDest(); |
| 754 const Type DestTy = Dest->getType(); |
| 755 if (isVectorType(DestTy)) { |
| 756 auto *CmpInstr = llvm::cast<InstFcmp>(Instr); |
| 757 const auto Condition = CmpInstr->getCondition(); |
| 758 scalarizeInstruction(Dest, CmpInstr->getSrc(0), CmpInstr->getSrc(1), |
| 759 [this, Condition](Variable *Dest, Variable *Src0, |
| 760 Variable *Src1) { |
| 761 return Context.insert<InstFcmp>(Condition, Dest, |
| 762 Src0, Src1); |
| 763 }); |
| 764 CmpInstr->setDeleted(); |
| 765 } |
| 766 return; |
| 767 } |
724 } | 768 } |
725 } | 769 } |
726 | 770 |
727 void TargetARM32::findMaxStackOutArgsSize() { | 771 void TargetARM32::findMaxStackOutArgsSize() { |
728 // MinNeededOutArgsBytes should be updated if the Target ever creates a | 772 // MinNeededOutArgsBytes should be updated if the Target ever creates a |
729 // high-level InstCall that requires more stack bytes. | 773 // high-level InstCall that requires more stack bytes. |
730 constexpr size_t MinNeededOutArgsBytes = 0; | 774 constexpr size_t MinNeededOutArgsBytes = 0; |
731 MaxOutArgsSizeBytes = MinNeededOutArgsBytes; | 775 MaxOutArgsSizeBytes = MinNeededOutArgsBytes; |
732 for (CfgNode *Node : Func->getNodes()) { | 776 for (CfgNode *Node : Func->getNodes()) { |
733 Context.init(Node); | 777 Context.init(Node); |
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4189 _cmp(ConstR, NonConstF); | 4233 _cmp(ConstR, NonConstF); |
4190 } else { | 4234 } else { |
4191 Variable *T = makeReg(IceType_i32); | 4235 Variable *T = makeReg(IceType_i32); |
4192 _rsbs(T, ConstR, NonConstF); | 4236 _rsbs(T, ConstR, NonConstF); |
4193 Context.insert<InstFakeUse>(T); | 4237 Context.insert<InstFakeUse>(T); |
4194 } | 4238 } |
4195 return CondWhenTrue(getIcmp32Mapping(Condition)); | 4239 return CondWhenTrue(getIcmp32Mapping(Condition)); |
4196 } | 4240 } |
4197 | 4241 |
4198 TargetARM32::CondWhenTrue TargetARM32::lowerIcmpCond(const InstIcmp *Instr) { | 4242 TargetARM32::CondWhenTrue TargetARM32::lowerIcmpCond(const InstIcmp *Instr) { |
4199 assert(Instr->getSrc(0)->getType() != IceType_i1); | |
4200 assert(Instr->getSrc(1)->getType() != IceType_i1); | |
4201 | |
4202 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); | 4243 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); |
4203 Operand *Src1 = legalizeUndef(Instr->getSrc(1)); | 4244 Operand *Src1 = legalizeUndef(Instr->getSrc(1)); |
4204 | 4245 |
4205 const InstIcmp::ICond Condition = Instr->getCondition(); | 4246 const InstIcmp::ICond Condition = Instr->getCondition(); |
4206 // a=icmp cond b, c ==> | 4247 // a=icmp cond b, c ==> |
4207 // GCC does: | 4248 // GCC does: |
4208 // <u/s>xtb tb, b | 4249 // <u/s>xtb tb, b |
4209 // <u/s>xtb tc, c | 4250 // <u/s>xtb tc, c |
4210 // cmp tb, tc | 4251 // cmp tb, tc |
4211 // mov.C1 t, #0 | 4252 // mov.C1 t, #0 |
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4228 // the left shift is by 0, 16, or 24, which allows the comparison to focus on | 4269 // the left shift is by 0, 16, or 24, which allows the comparison to focus on |
4229 // the digits that actually matter (for 16-bit or 8-bit signed/unsigned). For | 4270 // the digits that actually matter (for 16-bit or 8-bit signed/unsigned). For |
4230 // the unsigned case, for some reason it does similar to GCC and does a uxtb | 4271 // the unsigned case, for some reason it does similar to GCC and does a uxtb |
4231 // first. It's not clear to me why that special-casing is needed. | 4272 // first. It's not clear to me why that special-casing is needed. |
4232 // | 4273 // |
4233 // We'll go with the LLVM way for now, since it's shorter and has just as few | 4274 // We'll go with the LLVM way for now, since it's shorter and has just as few |
4234 // dependencies. | 4275 // dependencies. |
4235 switch (Src0->getType()) { | 4276 switch (Src0->getType()) { |
4236 default: | 4277 default: |
4237 llvm::report_fatal_error("Unhandled type in lowerIcmpCond"); | 4278 llvm::report_fatal_error("Unhandled type in lowerIcmpCond"); |
| 4279 case IceType_i1: |
4238 case IceType_i8: | 4280 case IceType_i8: |
4239 case IceType_i16: | 4281 case IceType_i16: |
4240 return lowerInt8AndInt16IcmpCond(Condition, Src0, Src1); | 4282 return lowerInt8AndInt16IcmpCond(Condition, Src0, Src1); |
4241 case IceType_i32: | 4283 case IceType_i32: |
4242 return lowerInt32IcmpCond(Condition, Src0, Src1); | 4284 return lowerInt32IcmpCond(Condition, Src0, Src1); |
4243 case IceType_i64: | 4285 case IceType_i64: |
4244 return lowerInt64IcmpCond(Condition, Src0, Src1); | 4286 return lowerInt64IcmpCond(Condition, Src0, Src1); |
4245 } | 4287 } |
4246 } | 4288 } |
4247 | 4289 |
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6585 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; | 6627 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; |
6586 } | 6628 } |
6587 | 6629 |
6588 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; | 6630 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; |
6589 llvm::SmallBitVector | 6631 llvm::SmallBitVector |
6590 TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; | 6632 TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; |
6591 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; | 6633 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; |
6592 | 6634 |
6593 } // end of namespace ARM32 | 6635 } // end of namespace ARM32 |
6594 } // end of namespace Ice | 6636 } // end of namespace Ice |
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