ARM32 vector ops - scalarize icmp, fcmp and cast.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 557 matching lines @@
       Instr->setDeleted();
       return;
     }
     }
     llvm::report_fatal_error("Control flow should never have reached here.");
   }
   case Inst::Cast: {
     Variable *Dest = Instr->getDest();
     Operand *Src0 = Instr->getSrc(0);
     const Type DestTy = Dest->getType();
-    const InstCast::OpKind CastKind =
-        llvm::cast<InstCast>(Instr)->getCastKind();
+    auto *CastInstr = llvm::cast<InstCast>(Instr);
+    const InstCast::OpKind CastKind = CastInstr->getCastKind();
+
+    if (isVectorType(DestTy)) {
+      scalarizeUnaryInstruction(Dest, Src0,
+                                [this, CastKind](Variable *Dest,
+                                                 Variable *Src) {
+                                  return Context.insert<InstCast>(CastKind,
+                                                                  Dest, Src);
+                                });
+      CastInstr->setDeleted();
+      return;
+    }
+
     switch (CastKind) {
     default:
       return;
     case InstCast::Fptosi:
     case InstCast::Fptoui: {
       if (DestTy != IceType_i64) {
         return;
       }
       const bool DestIsSigned = CastKind == InstCast::Fptosi;
       const bool Src0IsF32 = isFloat32Asserting32Or64(Src0->getType());
@@ skipping 124 matching lines @@
       Operand *TargetHelper = Ctx->getConstantExternSym(H_call_setjmp);
       auto *Call = Context.insert<InstCall>(MaxArgs, Dest, TargetHelper,
                                             NoTailCall, IsTargetHelperCall);
       Call->addArg(IntrinsicCall->getArg(0));
       Instr->setDeleted();
       return;
     }
     }
     llvm::report_fatal_error("Control flow should never have reached here.");
   }
+  case Inst::Icmp: {
+    Variable *Dest = Instr->getDest();
+    const Type DestTy = Dest->getType();
+    if (isVectorType(DestTy)) {
+      auto *CmpInstr = llvm::cast<InstIcmp>(Instr);
+      const auto Condition = CmpInstr->getCondition();
+      scalarizeInstruction(Dest, CmpInstr->getSrc(0), CmpInstr->getSrc(1),
+                           [this, Condition](Variable *Dest, Variable *Src0,
+                                             Variable *Src1) {
+                             return Context.insert<InstIcmp>(Condition, Dest,
+                                                             Src0, Src1);
+                           });
+      CmpInstr->setDeleted();
+    }
+    return;
+  }
+  case Inst::Fcmp: {
+    Variable *Dest = Instr->getDest();
+    const Type DestTy = Dest->getType();
+    if (isVectorType(DestTy)) {
+      auto *CmpInstr = llvm::cast<InstFcmp>(Instr);
+      const auto Condition = CmpInstr->getCondition();
+      scalarizeInstruction(Dest, CmpInstr->getSrc(0), CmpInstr->getSrc(1),
+                           [this, Condition](Variable *Dest, Variable *Src0,
+                                             Variable *Src1) {
+                             return Context.insert<InstFcmp>(Condition, Dest,
+                                                             Src0, Src1);
+                           });
+      CmpInstr->setDeleted();
+    }
+    return;
+  }
   }
 }
 
 void TargetARM32::findMaxStackOutArgsSize() {
   // MinNeededOutArgsBytes should be updated if the Target ever creates a
   // high-level InstCall that requires more stack bytes.
   constexpr size_t MinNeededOutArgsBytes = 0;
   MaxOutArgsSizeBytes = MinNeededOutArgsBytes;
   for (CfgNode *Node : Func->getNodes()) {
     Context.init(Node);
@@ skipping 3455 matching lines @@
     _cmp(ConstR, NonConstF);
   } else {
     Variable *T = makeReg(IceType_i32);
     _rsbs(T, ConstR, NonConstF);
     Context.insert<InstFakeUse>(T);
   }
   return CondWhenTrue(getIcmp32Mapping(Condition));
 }
 
 TargetARM32::CondWhenTrue TargetARM32::lowerIcmpCond(const InstIcmp *Instr) {
-  assert(Instr->getSrc(0)->getType() != IceType_i1);
-  assert(Instr->getSrc(1)->getType() != IceType_i1);
-
   Operand *Src0 = legalizeUndef(Instr->getSrc(0));
   Operand *Src1 = legalizeUndef(Instr->getSrc(1));
 
   const InstIcmp::ICond Condition = Instr->getCondition();
   // a=icmp cond b, c ==>
   // GCC does:
   //   <u/s>xtb tb, b
   //   <u/s>xtb tc, c
   //   cmp      tb, tc
   //   mov.C1   t, #0
@@ skipping 16 matching lines @@
   // the left shift is by 0, 16, or 24, which allows the comparison to focus on
   // the digits that actually matter (for 16-bit or 8-bit signed/unsigned). For
   // the unsigned case, for some reason it does similar to GCC and does a uxtb
   // first. It's not clear to me why that special-casing is needed.
   //
   // We'll go with the LLVM way for now, since it's shorter and has just as few
   // dependencies.
   switch (Src0->getType()) {
   default:
     llvm::report_fatal_error("Unhandled type in lowerIcmpCond");
+  case IceType_i1:
   case IceType_i8:
   case IceType_i16:
     return lowerInt8AndInt16IcmpCond(Condition, Src0, Src1);
   case IceType_i32:
     return lowerInt32IcmpCond(Condition, Src0, Src1);
   case IceType_i64:
     return lowerInt64IcmpCond(Condition, Src0, Src1);
   }
 }
 
@@ skipping 2337 matching lines @@
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
 llvm::SmallBitVector
     TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 
 } // end of namespace ARM32
 } // end of namespace Ice