Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(193)

Side by Side Diff: src/IceInstARM32.cpp

Issue 1683153003: ARM32 vector ops - scalarize icmp, fcmp and cast. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Adding tests for vector icmp and fcmp Created 4 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | src/IceTargetLowering.h » ('j') | src/IceTargetLowering.h » ('J')
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 1735 matching lines...) Expand 10 before | Expand all | Expand 10 after
1746 case IceType_f32: 1746 case IceType_f32:
1747 Asm->vldrs(Dest, getSrc(0), getPredicate(), Func->getTarget()); 1747 Asm->vldrs(Dest, getSrc(0), getPredicate(), Func->getTarget());
1748 break; 1748 break;
1749 case IceType_f64: 1749 case IceType_f64:
1750 Asm->vldrd(Dest, getSrc(0), getPredicate(), Func->getTarget()); 1750 Asm->vldrd(Dest, getSrc(0), getPredicate(), Func->getTarget());
1751 break; 1751 break;
1752 case IceType_v16i8: 1752 case IceType_v16i8:
1753 case IceType_v8i16: 1753 case IceType_v8i16:
1754 case IceType_v4i32: 1754 case IceType_v4i32:
1755 case IceType_v4f32: 1755 case IceType_v4f32:
1756 case IceType_v16i1:
1757 case IceType_v8i1:
Jim Stichnoth 2016/02/10 19:08:11 make format
Eric Holk 2016/02/10 21:07:20 Done.
1758 case IceType_v4i1:
1756 Asm->vld1qr(getVecElmtBitsize(DestTy), Dest, getSrc(0), Func->getTarget()); 1759 Asm->vld1qr(getVecElmtBitsize(DestTy), Dest, getSrc(0), Func->getTarget());
1757 break; 1760 break;
1758 } 1761 }
1759 } 1762 }
1760 1763
1761 template <> void InstARM32Ldrex::emit(const Cfg *Func) const { 1764 template <> void InstARM32Ldrex::emit(const Cfg *Func) const {
1762 if (!BuildDefs::dump()) 1765 if (!BuildDefs::dump())
1763 return; 1766 return;
1764 Ostream &Str = Func->getContext()->getStrEmit(); 1767 Ostream &Str = Func->getContext()->getStrEmit();
1765 assert(getSrcSize() == 1); 1768 assert(getSrcSize() == 1);
(...skipping 319 matching lines...) Expand 10 before | Expand all | Expand 10 after
2085 case IceType_f32: 2088 case IceType_f32:
2086 Asm->vstrs(Src0, Src1, getPredicate(), Func->getTarget()); 2089 Asm->vstrs(Src0, Src1, getPredicate(), Func->getTarget());
2087 break; 2090 break;
2088 case IceType_f64: 2091 case IceType_f64:
2089 Asm->vstrd(Src0, Src1, getPredicate(), Func->getTarget()); 2092 Asm->vstrd(Src0, Src1, getPredicate(), Func->getTarget());
2090 break; 2093 break;
2091 case IceType_v16i8: 2094 case IceType_v16i8:
2092 case IceType_v8i16: 2095 case IceType_v8i16:
2093 case IceType_v4i32: 2096 case IceType_v4i32:
2094 case IceType_v4f32: 2097 case IceType_v4f32:
2098 case IceType_v16i1:
2099 case IceType_v8i1:
2100 case IceType_v4i1:
2095 Asm->vst1qr(getVecElmtBitsize(Ty), Src0, Src1, Func->getTarget()); 2101 Asm->vst1qr(getVecElmtBitsize(Ty), Src0, Src1, Func->getTarget());
2096 break; 2102 break;
2097 } 2103 }
2098 } 2104 }
2099 2105
2100 void InstARM32Str::dump(const Cfg *Func) const { 2106 void InstARM32Str::dump(const Cfg *Func) const {
2101 if (!BuildDefs::dump()) 2107 if (!BuildDefs::dump())
2102 return; 2108 return;
2103 Ostream &Str = Func->getContext()->getStrDump(); 2109 Ostream &Str = Func->getContext()->getStrDump();
2104 Type Ty = getSrc(0)->getType(); 2110 Type Ty = getSrc(0)->getType();
(...skipping 607 matching lines...) Expand 10 before | Expand all | Expand 10 after
2712 2718
2713 template class InstARM32FourAddrGPR<InstARM32::Mla>; 2719 template class InstARM32FourAddrGPR<InstARM32::Mla>;
2714 template class InstARM32FourAddrGPR<InstARM32::Mls>; 2720 template class InstARM32FourAddrGPR<InstARM32::Mls>;
2715 2721
2716 template class InstARM32CmpLike<InstARM32::Cmn>; 2722 template class InstARM32CmpLike<InstARM32::Cmn>;
2717 template class InstARM32CmpLike<InstARM32::Cmp>; 2723 template class InstARM32CmpLike<InstARM32::Cmp>;
2718 template class InstARM32CmpLike<InstARM32::Tst>; 2724 template class InstARM32CmpLike<InstARM32::Tst>;
2719 2725
2720 } // end of namespace ARM32 2726 } // end of namespace ARM32
2721 } // end of namespace Ice 2727 } // end of namespace Ice
OLDNEW
« no previous file with comments | « no previous file | src/IceTargetLowering.h » ('j') | src/IceTargetLowering.h » ('J')

Powered by Google App Engine
This is Rietveld 408576698