Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(126)

Side by Side Diff: tests_lit/llvm2ice_tests/arith.ll

Issue 1682253003: Fix bug in arith.ll (ARM) tests. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; Assembly test for simple arithmetic operations. 1 ; Assembly test for simple arithmetic operations.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 \ 4 ; RUN: --target x8632 -i %s --args -O2 \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 7 ; RUN: %if --need=target_ARM32 --need=allow_dump \
8 ; RUN: --command %p2i --filetype=obj --assemble --disassemble --target arm32 \ 8 ; RUN: --command %p2i --filetype=obj --assemble --disassemble --target arm32 \
9 ; RUN: -i %s --args -O2 \ 9 ; RUN: -i %s --args -O2 \
10 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ 10 ; RUN: | %if --need=target_ARM32 --need=allow_dump \
(...skipping 144 matching lines...) Expand 10 before | Expand all | Expand 10 after
155 %div = sdiv i32 %a, %b 155 %div = sdiv i32 %a, %b
156 ret i32 %div 156 ret i32 %div
157 } 157 }
158 ; CHECK-LABEL: Sdiv 158 ; CHECK-LABEL: Sdiv
159 ; CHECK: cdq 159 ; CHECK: cdq
160 ; CHECK: idiv e 160 ; CHECK: idiv e
161 ; 161 ;
162 ; ARM32-LABEL: Sdiv 162 ; ARM32-LABEL: Sdiv
163 ; ARM32: tst [[DENOM:r.*]], [[DENOM]] 163 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
164 ; ARM32: bne 164 ; ARM32: bne
165 ; AARM32: .word 0xe7fedef0 165 ; The following instruction is ".word 0xe7fedef0 = udf #60896 ; 0xede0".
166 ; ARM32: udf #60896 ; 0xede0 166 ; ARM32: e7fedef0
167 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __divsi3 167 ; ARM32: movw [[CALL:r[0-9]]], {{.+}} __divsi3
168 ; ARM32: movt [[CALL]], {{.+}} __divsi3 168 ; ARM32: movt [[CALL]], {{.+}} __divsi3
169 ; ARM32: blx [[CALL]] 169 ; ARM32: blx [[CALL]]
170 ; ARM32HWDIV-LABEL: Sdiv 170 ; ARM32HWDIV-LABEL: Sdiv
171 ; ARM32HWDIV: tst 171 ; ARM32HWDIV: tst
172 ; ARM32HWDIV: bne 172 ; ARM32HWDIV: bne
173 ; ARM32HWDIV: sdiv 173 ; ARM32HWDIV: sdiv
174 174
175 ; MIPS32-LABEL: Sdiv 175 ; MIPS32-LABEL: Sdiv
176 176
(...skipping 107 matching lines...) Expand 10 before | Expand all | Expand 10 after
284 ; CHECK: shr {{.*}},cl 284 ; CHECK: shr {{.*}},cl
285 285
286 define internal i32 @AshrReloc(i32 %a) { 286 define internal i32 @AshrReloc(i32 %a) {
287 entry: 287 entry:
288 %opnd = ptrtoint [4 x i8]* @G to i32 288 %opnd = ptrtoint [4 x i8]* @G to i32
289 %result = ashr i32 %a, %opnd 289 %result = ashr i32 %a, %opnd
290 ret i32 %result 290 ret i32 %result
291 } 291 }
292 ; CHECK-LABEL: AshrReloc 292 ; CHECK-LABEL: AshrReloc
293 ; CHECK: sar {{.*}},cl 293 ; CHECK: sar {{.*}},cl
OLDNEW
« no previous file with comments | « no previous file | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698