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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_PPC | 8 #if V8_TARGET_ARCH_PPC |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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| 709 return MemOperand(sp, doubles_size + register_offset); | 709 return MemOperand(sp, doubles_size + register_offset); |
| 710 } | 710 } |
| 711 | 711 |
| 712 | 712 |
| 713 void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst, | 713 void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst, |
| 714 const DoubleRegister src) { | 714 const DoubleRegister src) { |
| 715 // Turn potential sNaN into qNaN. | 715 // Turn potential sNaN into qNaN. |
| 716 fsub(dst, src, kDoubleRegZero); | 716 fsub(dst, src, kDoubleRegZero); |
| 717 } | 717 } |
| 718 | 718 |
| 719 | 719 void MacroAssembler::ConvertIntToDouble(Register src, DoubleRegister dst) { |
| 720 void MacroAssembler::ConvertIntToDouble(Register src, | 720 MovIntToDouble(dst, src, r0); |
| 721 DoubleRegister double_dst) { | 721 fcfid(dst, dst); |
| 722 MovIntToDouble(double_dst, src, r0); | |
| 723 fcfid(double_dst, double_dst); | |
| 724 } | 722 } |
| 725 | 723 |
| 726 | |
| 727 void MacroAssembler::ConvertUnsignedIntToDouble(Register src, | 724 void MacroAssembler::ConvertUnsignedIntToDouble(Register src, |
| 728 DoubleRegister double_dst) { | 725 DoubleRegister dst) { |
| 729 MovUnsignedIntToDouble(double_dst, src, r0); | 726 MovUnsignedIntToDouble(dst, src, r0); |
| 730 fcfid(double_dst, double_dst); | 727 fcfid(dst, dst); |
| 731 } | 728 } |
| 732 | 729 |
| 733 | 730 void MacroAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) { |
| 734 void MacroAssembler::ConvertIntToFloat(const DoubleRegister dst, | 731 MovIntToDouble(dst, src, r0); |
| 735 const Register src, | |
| 736 const Register int_scratch) { | |
| 737 MovIntToDouble(dst, src, int_scratch); | |
| 738 fcfids(dst, dst); | 732 fcfids(dst, dst); |
| 739 } | 733 } |
| 740 | 734 |
| 735 void MacroAssembler::ConvertUnsignedIntToFloat(Register src, |
| 736 DoubleRegister dst) { |
| 737 MovUnsignedIntToDouble(dst, src, r0); |
| 738 fcfids(dst, dst); |
| 739 } |
| 741 | 740 |
| 742 #if V8_TARGET_ARCH_PPC64 | 741 #if V8_TARGET_ARCH_PPC64 |
| 743 void MacroAssembler::ConvertInt64ToDouble(Register src, | 742 void MacroAssembler::ConvertInt64ToDouble(Register src, |
| 744 DoubleRegister double_dst) { | 743 DoubleRegister double_dst) { |
| 745 MovInt64ToDouble(double_dst, src); | 744 MovInt64ToDouble(double_dst, src); |
| 746 fcfid(double_dst, double_dst); | 745 fcfid(double_dst, double_dst); |
| 747 } | 746 } |
| 748 | 747 |
| 749 | 748 |
| 750 void MacroAssembler::ConvertUnsignedInt64ToFloat(Register src, | 749 void MacroAssembler::ConvertUnsignedInt64ToFloat(Register src, |
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| 4411 } | 4410 } |
| 4412 if (mag.shift > 0) srawi(result, result, mag.shift); | 4411 if (mag.shift > 0) srawi(result, result, mag.shift); |
| 4413 ExtractBit(r0, dividend, 31); | 4412 ExtractBit(r0, dividend, 31); |
| 4414 add(result, result, r0); | 4413 add(result, result, r0); |
| 4415 } | 4414 } |
| 4416 | 4415 |
| 4417 } // namespace internal | 4416 } // namespace internal |
| 4418 } // namespace v8 | 4417 } // namespace v8 |
| 4419 | 4418 |
| 4420 #endif // V8_TARGET_ARCH_PPC | 4419 #endif // V8_TARGET_ARCH_PPC |
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