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1 /* | 1 /* |
2 * Copyright (c) 2012 The LibYuv project authors. All Rights Reserved. | 2 * Copyright (c) 2012 The LibYuv project authors. All Rights Reserved. |
3 * | 3 * |
4 * Use of this source code is governed by a BSD-style license | 4 * Use of this source code is governed by a BSD-style license |
5 * that can be found in the LICENSE file in the root of the source | 5 * that can be found in the LICENSE file in the root of the source |
6 * tree. An additional intellectual property rights grant can be found | 6 * tree. An additional intellectual property rights grant can be found |
7 * in the file PATENTS. All contributing project authors may | 7 * in the file PATENTS. All contributing project authors may |
8 * be found in the AUTHORS file in the root of the source tree. | 8 * be found in the AUTHORS file in the root of the source tree. |
9 */ | 9 */ |
10 | 10 |
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368 ".set at \n" | 368 ".set at \n" |
369 ".set reorder \n" | 369 ".set reorder \n" |
370 : [dst] "+r" (dst), [src] "+r" (src) | 370 : [dst] "+r" (dst), [src] "+r" (src) |
371 : [count] "r" (count) | 371 : [count] "r" (count) |
372 : "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", | 372 : "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", |
373 "t8", "t9", "a3", "v1", "at" | 373 "t8", "t9", "a3", "v1", "at" |
374 ); | 374 ); |
375 } | 375 } |
376 #endif // HAS_COPYROW_MIPS | 376 #endif // HAS_COPYROW_MIPS |
377 | 377 |
378 // MIPS DSPR2 functions | 378 // DSPR2 functions |
379 #if !defined(LIBYUV_DISABLE_MIPS) && defined(__mips_dsp) && \ | 379 #if !defined(LIBYUV_DISABLE_MIPS) && defined(__mips_dsp) && \ |
380 (__mips_dsp_rev >= 2) && \ | 380 (__mips_dsp_rev >= 2) && \ |
381 (_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6) | 381 (_MIPS_SIM == _MIPS_SIM_ABI32) && (__mips_isa_rev < 6) |
382 | 382 |
383 void SplitUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, | 383 void SplitUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, |
384 int width) { | 384 int width) { |
385 __asm__ __volatile__ ( | 385 __asm__ __volatile__ ( |
386 ".set push \n" | 386 ".set push \n" |
387 ".set noreorder \n" | 387 ".set noreorder \n" |
388 "srl $t4, %[width], 4 \n" // multiplies of 16 | 388 "srl $t4, %[width], 4 \n" // multiplies of 16 |
389 "blez $t4, 2f \n" | 389 "blez $t4, 2f \n" |
390 " andi %[width], %[width], 0xf \n" // residual | 390 " andi %[width], %[width], 0xf \n" // residual |
391 | 391 |
392 "1: \n" | 392 "1: \n" |
393 "addiu $t4, $t4, -1 \n" | 393 "addiu $t4, $t4, -1 \n" |
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439 : [src_uv] "+r" (src_uv), | 439 : [src_uv] "+r" (src_uv), |
440 [width] "+r" (width), | 440 [width] "+r" (width), |
441 [dst_u] "+r" (dst_u), | 441 [dst_u] "+r" (dst_u), |
442 [dst_v] "+r" (dst_v) | 442 [dst_v] "+r" (dst_v) |
443 : | 443 : |
444 : "t0", "t1", "t2", "t3", | 444 : "t0", "t1", "t2", "t3", |
445 "t4", "t5", "t6", "t7", "t8", "t9" | 445 "t4", "t5", "t6", "t7", "t8", "t9" |
446 ); | 446 ); |
447 } | 447 } |
448 | 448 |
449 void MirrorRow_MIPS_DSPR2(const uint8* src, uint8* dst, int width) { | 449 void MirrorRow_DSPR2(const uint8* src, uint8* dst, int width) { |
450 __asm__ __volatile__ ( | 450 __asm__ __volatile__ ( |
451 ".set push \n" | 451 ".set push \n" |
452 ".set noreorder \n" | 452 ".set noreorder \n" |
453 | 453 |
454 "srl $t4, %[width], 4 \n" // multiplies of 16 | 454 "srl $t4, %[width], 4 \n" // multiplies of 16 |
455 "andi $t5, %[width], 0xf \n" | 455 "andi $t5, %[width], 0xf \n" |
456 "blez $t4, 2f \n" | 456 "blez $t4, 2f \n" |
457 " addu %[src], %[src], %[width] \n" // src += width | 457 " addu %[src], %[src], %[width] \n" // src += width |
458 | 458 |
459 "1: \n" | 459 "1: \n" |
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489 " addiu %[dst], %[dst], 1 \n" | 489 " addiu %[dst], %[dst], 1 \n" |
490 | 490 |
491 "3: \n" | 491 "3: \n" |
492 ".set pop \n" | 492 ".set pop \n" |
493 : [src] "+r" (src), [dst] "+r" (dst) | 493 : [src] "+r" (src), [dst] "+r" (dst) |
494 : [width] "r" (width) | 494 : [width] "r" (width) |
495 : "t0", "t1", "t2", "t3", "t4", "t5" | 495 : "t0", "t1", "t2", "t3", "t4", "t5" |
496 ); | 496 ); |
497 } | 497 } |
498 | 498 |
499 void MirrorUVRow_MIPS_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, | 499 void MirrorUVRow_DSPR2(const uint8* src_uv, uint8* dst_u, uint8* dst_v, |
500 int width) { | 500 int width) { |
501 int x = 0; | 501 int x = 0; |
502 int y = 0; | 502 int y = 0; |
503 __asm__ __volatile__ ( | 503 __asm__ __volatile__ ( |
504 ".set push \n" | 504 ".set push \n" |
505 ".set noreorder \n" | 505 ".set noreorder \n" |
506 | 506 |
507 "addu $t4, %[width], %[width] \n" | 507 "addu $t4, %[width], %[width] \n" |
508 "srl %[x], %[width], 4 \n" | 508 "srl %[x], %[width], 4 \n" |
509 "andi %[y], %[width], 0xf \n" | 509 "andi %[y], %[width], 0xf \n" |
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646 "shra.ph $t2, $t2, 8 \n" \ | 646 "shra.ph $t2, $t2, 8 \n" \ |
647 "shra.ph $t1, $t1, 8 \n" \ | 647 "shra.ph $t1, $t1, 8 \n" \ |
648 "addu.ph $t5, $t5, $s5 \n" \ | 648 "addu.ph $t5, $t5, $s5 \n" \ |
649 "addu.ph $t4, $t4, $s5 \n" \ | 649 "addu.ph $t4, $t4, $s5 \n" \ |
650 "addu.ph $t9, $t9, $s5 \n" \ | 650 "addu.ph $t9, $t9, $s5 \n" \ |
651 "addu.ph $t8, $t8, $s5 \n" \ | 651 "addu.ph $t8, $t8, $s5 \n" \ |
652 "addu.ph $t2, $t2, $s5 \n" \ | 652 "addu.ph $t2, $t2, $s5 \n" \ |
653 "addu.ph $t1, $t1, $s5 \n" | 653 "addu.ph $t1, $t1, $s5 \n" |
654 | 654 |
655 // TODO(fbarchard): accept yuv conversion constants. | 655 // TODO(fbarchard): accept yuv conversion constants. |
656 void I422ToARGBRow_MIPS_DSPR2(const uint8* y_buf, | 656 void I422ToARGBRow_DSPR2(const uint8* y_buf, |
657 const uint8* u_buf, | 657 const uint8* u_buf, |
658 const uint8* v_buf, | 658 const uint8* v_buf, |
659 uint8* rgb_buf, | 659 uint8* rgb_buf, |
660 const struct YuvConstants* yuvconstants, | 660 const struct YuvConstants* yuvconstants, |
661 int width) { | 661 int width) { |
662 __asm__ __volatile__ ( | 662 __asm__ __volatile__ ( |
663 ".set push \n" | 663 ".set push \n" |
664 ".set noreorder \n" | 664 ".set noreorder \n" |
665 "beqz %[width], 2f \n" | 665 "beqz %[width], 2f \n" |
666 " repl.ph $s0, 74 \n" // |YG|YG| = |74|74| | 666 " repl.ph $s0, 74 \n" // |YG|YG| = |74|74| |
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709 [rgb_buf] "+r" (rgb_buf) | 709 [rgb_buf] "+r" (rgb_buf) |
710 : | 710 : |
711 : "t0", "t1", "t2", "t3", "t4", "t5", | 711 : "t0", "t1", "t2", "t3", "t4", "t5", |
712 "t6", "t7", "t8", "t9", | 712 "t6", "t7", "t8", "t9", |
713 "s0", "s1", "s2", "s3", | 713 "s0", "s1", "s2", "s3", |
714 "s4", "s5", "s6" | 714 "s4", "s5", "s6" |
715 ); | 715 ); |
716 } | 716 } |
717 | 717 |
718 // Bilinear filter 8x2 -> 8x1 | 718 // Bilinear filter 8x2 -> 8x1 |
719 void InterpolateRow_MIPS_DSPR2(uint8* dst_ptr, const uint8* src_ptr, | 719 void InterpolateRow_DSPR2(uint8* dst_ptr, const uint8* src_ptr, |
720 ptrdiff_t src_stride, int dst_width, | 720 ptrdiff_t src_stride, int dst_width, |
721 int source_y_fraction) { | 721 int source_y_fraction) { |
722 int y0_fraction = 256 - source_y_fraction; | 722 int y0_fraction = 256 - source_y_fraction; |
723 const uint8* src_ptr1 = src_ptr + src_stride; | 723 const uint8* src_ptr1 = src_ptr + src_stride; |
724 | 724 |
725 __asm__ __volatile__ ( | 725 __asm__ __volatile__ ( |
726 ".set push \n" | 726 ".set push \n" |
727 ".set noreorder \n" | 727 ".set noreorder \n" |
728 | 728 |
729 "replv.ph $t0, %[y0_fraction] \n" | 729 "replv.ph $t0, %[y0_fraction] \n" |
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773 ); | 773 ); |
774 } | 774 } |
775 #endif // __mips_dsp_rev >= 2 | 775 #endif // __mips_dsp_rev >= 2 |
776 | 776 |
777 #endif // defined(__mips__) | 777 #endif // defined(__mips__) |
778 | 778 |
779 #ifdef __cplusplus | 779 #ifdef __cplusplus |
780 } // extern "C" | 780 } // extern "C" |
781 } // namespace libyuv | 781 } // namespace libyuv |
782 #endif | 782 #endif |
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