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Issue 1677633002: rename MIPS_DSPR2 to DSPR2 for consistency (Closed) Base URL: https://chromium.googlesource.com/libyuv/libyuv@master
Patch Set: git cl try Created 4 years, 10 months ago
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1 /* 1 /*
2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved.
3 * 3 *
4 * Use of this source code is governed by a BSD-style license 4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source 5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found 6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may 7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree. 8 * be found in the AUTHORS file in the root of the source tree.
9 */ 9 */
10 10
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42 } 42 }
43 #endif 43 #endif
44 #if defined(HAS_TRANSPOSEWX8_FAST_SSSE3) 44 #if defined(HAS_TRANSPOSEWX8_FAST_SSSE3)
45 if (TestCpuFlag(kCpuHasSSSE3)) { 45 if (TestCpuFlag(kCpuHasSSSE3)) {
46 TransposeWx8 = TransposeWx8_Fast_Any_SSSE3; 46 TransposeWx8 = TransposeWx8_Fast_Any_SSSE3;
47 if (IS_ALIGNED(width, 16)) { 47 if (IS_ALIGNED(width, 16)) {
48 TransposeWx8 = TransposeWx8_Fast_SSSE3; 48 TransposeWx8 = TransposeWx8_Fast_SSSE3;
49 } 49 }
50 } 50 }
51 #endif 51 #endif
52 #if defined(HAS_TRANSPOSEWX8_MIPS_DSPR2) 52 #if defined(HAS_TRANSPOSEWX8_DSPR2)
53 if (TestCpuFlag(kCpuHasMIPS_DSPR2)) { 53 if (TestCpuFlag(kCpuHasDSPR2)) {
54 if (IS_ALIGNED(width, 4) && 54 if (IS_ALIGNED(width, 4) &&
55 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { 55 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
56 TransposeWx8 = TransposeWx8_Fast_MIPS_DSPR2; 56 TransposeWx8 = TransposeWx8_Fast_DSPR2;
57 } else { 57 } else {
58 TransposeWx8 = TransposeWx8_MIPS_DSPR2; 58 TransposeWx8 = TransposeWx8_DSPR2;
59 } 59 }
60 } 60 }
61 #endif 61 #endif
62 62
63 // Work across the source in 8x8 tiles 63 // Work across the source in 8x8 tiles
64 while (i >= 8) { 64 while (i >= 8) {
65 TransposeWx8(src, src_stride, dst, dst_stride, width); 65 TransposeWx8(src, src_stride, dst, dst_stride, width);
66 src += 8 * src_stride; // Go down 8 rows. 66 src += 8 * src_stride; // Go down 8 rows.
67 dst += 8; // Move over 8 columns. 67 dst += 8; // Move over 8 columns.
68 i -= 8; 68 i -= 8;
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127 #endif 127 #endif
128 #if defined(HAS_MIRRORROW_AVX2) 128 #if defined(HAS_MIRRORROW_AVX2)
129 if (TestCpuFlag(kCpuHasAVX2)) { 129 if (TestCpuFlag(kCpuHasAVX2)) {
130 MirrorRow = MirrorRow_Any_AVX2; 130 MirrorRow = MirrorRow_Any_AVX2;
131 if (IS_ALIGNED(width, 32)) { 131 if (IS_ALIGNED(width, 32)) {
132 MirrorRow = MirrorRow_AVX2; 132 MirrorRow = MirrorRow_AVX2;
133 } 133 }
134 } 134 }
135 #endif 135 #endif
136 // TODO(fbarchard): Mirror on mips handle unaligned memory. 136 // TODO(fbarchard): Mirror on mips handle unaligned memory.
137 #if defined(HAS_MIRRORROW_MIPS_DSPR2) 137 #if defined(HAS_MIRRORROW_DSPR2)
138 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && 138 if (TestCpuFlag(kCpuHasDSPR2) &&
139 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) && 139 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4) &&
140 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) { 140 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4)) {
141 MirrorRow = MirrorRow_MIPS_DSPR2; 141 MirrorRow = MirrorRow_DSPR2;
142 } 142 }
143 #endif 143 #endif
144 #if defined(HAS_COPYROW_SSE2) 144 #if defined(HAS_COPYROW_SSE2)
145 if (TestCpuFlag(kCpuHasSSE2)) { 145 if (TestCpuFlag(kCpuHasSSE2)) {
146 CopyRow = IS_ALIGNED(width, 32) ? CopyRow_SSE2 : CopyRow_Any_SSE2; 146 CopyRow = IS_ALIGNED(width, 32) ? CopyRow_SSE2 : CopyRow_Any_SSE2;
147 } 147 }
148 #endif 148 #endif
149 #if defined(HAS_COPYROW_AVX) 149 #if defined(HAS_COPYROW_AVX)
150 if (TestCpuFlag(kCpuHasAVX)) { 150 if (TestCpuFlag(kCpuHasAVX)) {
151 CopyRow = IS_ALIGNED(width, 64) ? CopyRow_AVX : CopyRow_Any_AVX; 151 CopyRow = IS_ALIGNED(width, 64) ? CopyRow_AVX : CopyRow_Any_AVX;
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196 } 196 }
197 #endif 197 #endif
198 #if defined(HAS_TRANSPOSEUVWX8_SSE2) 198 #if defined(HAS_TRANSPOSEUVWX8_SSE2)
199 if (TestCpuFlag(kCpuHasSSE2)) { 199 if (TestCpuFlag(kCpuHasSSE2)) {
200 TransposeUVWx8 = TransposeUVWx8_Any_SSE2; 200 TransposeUVWx8 = TransposeUVWx8_Any_SSE2;
201 if (IS_ALIGNED(width, 8)) { 201 if (IS_ALIGNED(width, 8)) {
202 TransposeUVWx8 = TransposeUVWx8_SSE2; 202 TransposeUVWx8 = TransposeUVWx8_SSE2;
203 } 203 }
204 } 204 }
205 #endif 205 #endif
206 #if defined(HAS_TRANSPOSEUVWX8_MIPS_DSPR2) 206 #if defined(HAS_TRANSPOSEUVWX8_DSPR2)
207 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 2) && 207 if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 2) &&
208 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { 208 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
209 TransposeUVWx8 = TransposeUVWx8_MIPS_DSPR2; 209 TransposeUVWx8 = TransposeUVWx8_DSPR2;
210 } 210 }
211 #endif 211 #endif
212 212
213 // Work through the source in 8x8 tiles. 213 // Work through the source in 8x8 tiles.
214 while (i >= 8) { 214 while (i >= 8) {
215 TransposeUVWx8(src, src_stride, 215 TransposeUVWx8(src, src_stride,
216 dst_a, dst_stride_a, 216 dst_a, dst_stride_a,
217 dst_b, dst_stride_b, 217 dst_b, dst_stride_b,
218 width); 218 width);
219 src += 8 * src_stride; // Go down 8 rows. 219 src += 8 * src_stride; // Go down 8 rows.
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272 #if defined(HAS_MIRRORUVROW_NEON) 272 #if defined(HAS_MIRRORUVROW_NEON)
273 if (TestCpuFlag(kCpuHasNEON) && IS_ALIGNED(width, 8)) { 273 if (TestCpuFlag(kCpuHasNEON) && IS_ALIGNED(width, 8)) {
274 MirrorUVRow = MirrorUVRow_NEON; 274 MirrorUVRow = MirrorUVRow_NEON;
275 } 275 }
276 #endif 276 #endif
277 #if defined(HAS_MIRRORUVROW_SSSE3) 277 #if defined(HAS_MIRRORUVROW_SSSE3)
278 if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16)) { 278 if (TestCpuFlag(kCpuHasSSSE3) && IS_ALIGNED(width, 16)) {
279 MirrorUVRow = MirrorUVRow_SSSE3; 279 MirrorUVRow = MirrorUVRow_SSSE3;
280 } 280 }
281 #endif 281 #endif
282 #if defined(HAS_MIRRORUVROW_MIPS_DSPR2) 282 #if defined(HAS_MIRRORUVROW_DSPR2)
283 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && 283 if (TestCpuFlag(kCpuHasDSPR2) &&
284 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) { 284 IS_ALIGNED(src, 4) && IS_ALIGNED(src_stride, 4)) {
285 MirrorUVRow = MirrorUVRow_MIPS_DSPR2; 285 MirrorUVRow = MirrorUVRow_DSPR2;
286 } 286 }
287 #endif 287 #endif
288 288
289 dst_a += dst_stride_a * (height - 1); 289 dst_a += dst_stride_a * (height - 1);
290 dst_b += dst_stride_b * (height - 1); 290 dst_b += dst_stride_b * (height - 1);
291 291
292 for (i = 0; i < height; ++i) { 292 for (i = 0; i < height; ++i) {
293 MirrorUVRow(src, dst_a, dst_b, width); 293 MirrorUVRow(src, dst_a, dst_b, width);
294 src += src_stride; 294 src += src_stride;
295 dst_a -= dst_stride_a; 295 dst_a -= dst_stride_a;
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482 default: 482 default:
483 break; 483 break;
484 } 484 }
485 return -1; 485 return -1;
486 } 486 }
487 487
488 #ifdef __cplusplus 488 #ifdef __cplusplus
489 } // extern "C" 489 } // extern "C"
490 } // namespace libyuv 490 } // namespace libyuv
491 #endif 491 #endif
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