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| 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 951 | 951 |
| 952 void TargetARM32::emitVariable(const Variable *Var) const { | 952 void TargetARM32::emitVariable(const Variable *Var) const { |
| 953 if (!BuildDefs::dump()) | 953 if (!BuildDefs::dump()) |
| 954 return; | 954 return; |
| 955 Ostream &Str = Ctx->getStrEmit(); | 955 Ostream &Str = Ctx->getStrEmit(); |
| 956 if (Var->hasReg()) { | 956 if (Var->hasReg()) { |
| 957 Str << getRegName(Var->getRegNum(), Var->getType()); | 957 Str << getRegName(Var->getRegNum(), Var->getType()); |
| 958 return; | 958 return; |
| 959 } | 959 } |
| 960 if (Var->mustHaveReg()) { | 960 if (Var->mustHaveReg()) { |
| 961 llvm::report_fatal_error( | 961 llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName(Func) + |
| 962 "Infinite-weight Variable has no register assigned"); | 962 ") has no register assigned - function " + |
| 963 Func->getFunctionName()); |
| 963 } | 964 } |
| 964 assert(!Var->isRematerializable()); | 965 assert(!Var->isRematerializable()); |
| 965 int32_t Offset = Var->getStackOffset(); | 966 int32_t Offset = Var->getStackOffset(); |
| 966 int32_t BaseRegNum = Var->getBaseRegNum(); | 967 int32_t BaseRegNum = Var->getBaseRegNum(); |
| 967 if (BaseRegNum == Variable::NoRegister) { | 968 if (BaseRegNum == Variable::NoRegister) { |
| 968 BaseRegNum = getFrameOrStackReg(); | 969 BaseRegNum = getFrameOrStackReg(); |
| 969 } | 970 } |
| 970 const Type VarTy = Var->getType(); | 971 const Type VarTy = Var->getType(); |
| 971 Str << "[" << getRegName(BaseRegNum, VarTy); | 972 Str << "[" << getRegName(BaseRegNum, VarTy); |
| 972 if (Offset != 0) { | 973 if (Offset != 0) { |
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| 6523 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; | 6524 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; |
| 6524 } | 6525 } |
| 6525 | 6526 |
| 6526 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; | 6527 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM]; |
| 6527 llvm::SmallBitVector | 6528 llvm::SmallBitVector |
| 6528 TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; | 6529 TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM]; |
| 6529 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; | 6530 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; |
| 6530 | 6531 |
| 6531 } // end of namespace ARM32 | 6532 } // end of namespace ARM32 |
| 6532 } // end of namespace Ice | 6533 } // end of namespace Ice |
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