Subzero: Use a proper RegNumT type instead of int32_t/SizeT.

src/IceRegistersMIPS32.h

 //===- subzero/src/IceRegistersMIPS32.h - Register information --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 35 matching lines @@
                                                                                \
   Encoded_##val encode,
   REGMIPS32_GPR_TABLE
 #undef X
       Encoded_Not_GPR = -1
 };
 
 // TODO(jvoung): Floating point and vector registers...
 // Need to model overlap and difference in encoding too.
 
-static inline GPRRegister getEncodedGPR(int32_t RegNum) {
-  assert(Reg_GPR_First <= RegNum && RegNum <= Reg_GPR_Last);
+static inline GPRRegister getEncodedGPR(RegNumT RegNum) {
+  assert(int(Reg_GPR_First) <= int(RegNum));

[Eric Holk, 2016/02/08 19:37:10]

Again, is this the sort of place fixme should be used?

[Jim Stichnoth, 2016/02/09 19:33:39]

This would be especially hard to represent in RegNumT, I think, because it's not
only dependent on the target, but also specifically about whether the register
value represents a GPR or not.

Probably the right approach here would be to use an x-macro table to validate
the GPR status and hold the encoded value.  Since Reed is trying to follow the
ARM CL trail, it will probably end up that way in time.

[Eric Holk, 2016/02/10 01:11:30]

That makes sense.

+  assert(unsigned(RegNum) <= Reg_GPR_Last);
   return GPRRegister(RegNum - Reg_GPR_First);
 }
 
-const char *getRegName(int32_t RegNum);
+const char *getRegName(RegNumT RegNum);
 
 } // end of namespace RegMIPS32
 
 // Extend enum RegClass with MIPS32-specific register classes (if any).
 enum RegClassMIPS32 : uint8_t { RCMIPS32_NUM = RC_Target };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSMIPS32_H