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| 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// | 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 84 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 95 unsigned IsI64Pair : 1; | 95 unsigned IsI64Pair : 1; |
| 96 unsigned IsFP32 : 1; | 96 unsigned IsFP32 : 1; |
| 97 unsigned IsFP64 : 1; | 97 unsigned IsFP64 : 1; |
| 98 unsigned IsVec128 : 1; | 98 unsigned IsVec128 : 1; |
| 99 #define NUM_ALIASES_BITS 3 | 99 #define NUM_ALIASES_BITS 3 |
| 100 SizeT NumAliases : (NUM_ALIASES_BITS + 1); | 100 SizeT NumAliases : (NUM_ALIASES_BITS + 1); |
| 101 uint16_t Aliases[1 << NUM_ALIASES_BITS]; | 101 uint16_t Aliases[1 << NUM_ALIASES_BITS]; |
| 102 #undef NUM_ALIASES_BITS | 102 #undef NUM_ALIASES_BITS |
| 103 } RegTable[Reg_NUM]; | 103 } RegTable[Reg_NUM]; |
| 104 | 104 |
| 105 static inline bool isGPRegister(int32_t RegNum) { | 105 static inline void assertValidRegNum(RegNumT RegNum) { |
| 106 assert(RegNum >= 0); | 106 (void)RegNum; |
| 107 assert(RegNum < Reg_NUM); | 107 assert(RegNum != RegNumT::NoRegister); |
| 108 assert(unsigned(RegNum) < Reg_NUM); | |
|
Eric Holk
2016/02/08 19:37:10
Isn't this the sort of thing fixme is supposed to
Jim Stichnoth
2016/02/09 19:33:39
fixme() is really to flag inappropriate arithmetic
Eric Holk
2016/02/10 01:11:30
Sounds good.
Yeah, I guess this isn't really maki
| |
| 109 } | |
| 110 | |
| 111 static inline bool isGPRegister(RegNumT RegNum) { | |
| 112 assertValidRegNum(RegNum); | |
| 108 return RegTable[RegNum].IsGPR; | 113 return RegTable[RegNum].IsGPR; |
| 109 } | 114 } |
| 110 | 115 |
| 111 static constexpr inline SizeT getNumGPRegs() { | 116 static constexpr inline SizeT getNumGPRegs() { |
| 112 return 0 | 117 return 0 |
| 113 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ | 118 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ |
| 114 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 119 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
| 115 +(isGPR) | 120 +(isGPR) |
| 116 REGARM32_TABLE | 121 REGARM32_TABLE |
| 117 #undef X | 122 #undef X |
| 118 ; | 123 ; |
| 119 } | 124 } |
| 120 | 125 |
| 121 static inline GPRRegister getEncodedGPR(int32_t RegNum) { | 126 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { |
| 122 assert(RegNum >= 0); | 127 assertValidRegNum(RegNum); |
| 123 assert(RegNum < Reg_NUM); | |
| 124 return GPRRegister(RegTable[RegNum].Encoding); | 128 return GPRRegister(RegTable[RegNum].Encoding); |
| 125 } | 129 } |
| 126 | 130 |
| 127 static constexpr inline SizeT getNumGPRs() { | 131 static constexpr inline SizeT getNumGPRs() { |
| 128 return 0 | 132 return 0 |
| 129 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ | 133 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ |
| 130 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 134 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
| 131 +(isGPR) | 135 +(isGPR) |
| 132 REGARM32_TABLE | 136 REGARM32_TABLE |
| 133 #undef X | 137 #undef X |
| 134 ; | 138 ; |
| 135 } | 139 } |
| 136 | 140 |
| 137 static inline bool isGPR(int32_t RegNum) { | 141 static inline bool isGPR(RegNumT RegNum) { |
| 138 assert(RegNum >= 0); | 142 assertValidRegNum(RegNum); |
| 139 assert(RegNum < Reg_NUM); | |
| 140 return RegTable[RegNum].IsGPR; | 143 return RegTable[RegNum].IsGPR; |
| 141 } | 144 } |
| 142 | 145 |
| 143 static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) { | 146 static inline GPRRegister getI64PairFirstGPRNum(RegNumT RegNum) { |
| 144 assert(RegNum >= 0); | 147 assertValidRegNum(RegNum); |
| 145 assert(RegNum < Reg_NUM); | |
| 146 return GPRRegister(RegTable[RegNum].Encoding); | 148 return GPRRegister(RegTable[RegNum].Encoding); |
| 147 } | 149 } |
| 148 | 150 |
| 149 static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) { | 151 static inline GPRRegister getI64PairSecondGPRNum(RegNumT RegNum) { |
| 150 assert(RegNum >= 0); | 152 assertValidRegNum(RegNum); |
| 151 assert(RegNum < Reg_NUM); | |
| 152 return GPRRegister(RegTable[RegNum].Encoding + 1); | 153 return GPRRegister(RegTable[RegNum].Encoding + 1); |
| 153 } | 154 } |
| 154 | 155 |
| 155 static inline bool isI64RegisterPair(int32_t RegNum) { | 156 static inline bool isI64RegisterPair(RegNumT RegNum) { |
| 156 assert(RegNum >= 0); | 157 assertValidRegNum(RegNum); |
| 157 assert(RegNum < Reg_NUM); | |
| 158 return RegTable[RegNum].IsI64Pair; | 158 return RegTable[RegNum].IsI64Pair; |
| 159 } | 159 } |
| 160 | 160 |
| 161 static inline bool isEncodedSReg(int32_t RegNum) { | 161 static inline bool isEncodedSReg(RegNumT RegNum) { |
| 162 assert(RegNum >= 0); | 162 assertValidRegNum(RegNum); |
| 163 assert(RegNum < Reg_NUM); | |
| 164 return RegTable[RegNum].IsFP32; | 163 return RegTable[RegNum].IsFP32; |
| 165 } | 164 } |
| 166 | 165 |
| 167 static constexpr inline SizeT getNumSRegs() { | 166 static constexpr inline SizeT getNumSRegs() { |
| 168 return 0 | 167 return 0 |
| 169 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ | 168 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ |
| 170 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 169 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
| 171 +(isFP32) | 170 +(isFP32) |
| 172 REGARM32_TABLE | 171 REGARM32_TABLE |
| 173 #undef X | 172 #undef X |
| 174 ; | 173 ; |
| 175 } | 174 } |
| 176 | 175 |
| 177 static inline SRegister getEncodedSReg(int32_t RegNum) { | 176 static inline SRegister getEncodedSReg(RegNumT RegNum) { |
| 178 assert(RegNum >= 0); | 177 assertValidRegNum(RegNum); |
| 179 assert(RegNum < Reg_NUM); | |
| 180 return SRegister(RegTable[RegNum].Encoding); | 178 return SRegister(RegTable[RegNum].Encoding); |
| 181 } | 179 } |
| 182 | 180 |
| 183 static inline bool isEncodedDReg(int32_t RegNum) { | 181 static inline bool isEncodedDReg(RegNumT RegNum) { |
| 184 assert(RegNum >= 0); | 182 assertValidRegNum(RegNum); |
| 185 assert(RegNum < Reg_NUM); | |
| 186 return RegTable[RegNum].IsFP64; | 183 return RegTable[RegNum].IsFP64; |
| 187 } | 184 } |
| 188 | 185 |
| 189 static constexpr inline SizeT getNumDRegs() { | 186 static constexpr inline SizeT getNumDRegs() { |
| 190 return 0 | 187 return 0 |
| 191 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ | 188 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr, \ |
| 192 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ | 189 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ |
| 193 +(isFP64) | 190 +(isFP64) |
| 194 REGARM32_TABLE | 191 REGARM32_TABLE |
| 195 #undef X | 192 #undef X |
| 196 ; | 193 ; |
| 197 } | 194 } |
| 198 | 195 |
| 199 static inline DRegister getEncodedDReg(int32_t RegNum) { | 196 static inline DRegister getEncodedDReg(RegNumT RegNum) { |
| 200 assert(RegNum >= 0); | 197 assertValidRegNum(RegNum); |
| 201 assert(RegNum < Reg_NUM); | |
| 202 return DRegister(RegTable[RegNum].Encoding); | 198 return DRegister(RegTable[RegNum].Encoding); |
| 203 } | 199 } |
| 204 | 200 |
| 205 static inline bool isEncodedQReg(int32_t RegNum) { | 201 static inline bool isEncodedQReg(RegNumT RegNum) { |
| 206 assert(RegNum >= 0); | 202 assertValidRegNum(RegNum); |
| 207 assert(RegNum < Reg_NUM); | |
| 208 return RegTable[RegNum].IsVec128; | 203 return RegTable[RegNum].IsVec128; |
| 209 } | 204 } |
| 210 | 205 |
| 211 static inline QRegister getEncodedQReg(int32_t RegNum) { | 206 static inline QRegister getEncodedQReg(RegNumT RegNum) { |
| 212 assert(isEncodedQReg(RegNum)); | 207 assert(isEncodedQReg(RegNum)); |
| 213 return QRegister(RegTable[RegNum].Encoding); | 208 return QRegister(RegTable[RegNum].Encoding); |
| 214 } | 209 } |
| 215 | 210 |
| 216 static inline IceString getRegName(int32_t RegNum) { | 211 static inline IceString getRegName(RegNumT RegNum) { |
| 217 assert(RegNum >= 0); | 212 assertValidRegNum(RegNum); |
| 218 assert(RegNum < Reg_NUM); | |
| 219 return RegTable[RegNum].Name; | 213 return RegTable[RegNum].Name; |
| 220 } | 214 } |
| 221 | 215 |
| 222 // Extend enum RegClass with ARM32-specific register classes (if any). | 216 // Extend enum RegClass with ARM32-specific register classes (if any). |
| 223 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target }; | 217 enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target }; |
| 224 | 218 |
| 225 } // end of namespace RegARM32 | 219 } // end of namespace RegARM32 |
| 226 } // end of namespace ARM32 | 220 } // end of namespace ARM32 |
| 227 } // end of namespace Ice | 221 } // end of namespace Ice |
| 228 | 222 |
| 229 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H | 223 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H |
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