Subzero: Use a proper RegNumT type instead of int32_t/SizeT.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 320 matching lines @@
   const auto *Var2 = llvm::dyn_cast<Variable>(Opnd);
   if (Var2 == nullptr)
     return false;
 
   // If either operand lacks a register, they cannot be the same.
   if (!Var1->hasReg())
     return false;
   if (!Var2->hasReg())
     return false;
 
-  int32_t RegNum1 = Var1->getRegNum();
-  int32_t RegNum2 = Var2->getRegNum();
+  RegNumT RegNum1 = Var1->getRegNum();
+  RegNumT RegNum2 = Var2->getRegNum();
   // Quick common-case check.
   if (RegNum1 == RegNum2)
     return true;
 
   assert(Target->getAliasesForRegister(RegNum1)[RegNum2] ==
          Target->getAliasesForRegister(RegNum2)[RegNum1]);
   return Target->getAliasesForRegister(RegNum1)[RegNum2];
 }
 
 // Update NumPred for all Phi assignments using Var as their Dest variable.
@@ skipping 560 matching lines @@
 namespace {
 
 // Helper functions for emit().
 
 void emitRegisterUsage(Ostream &Str, const Cfg *Func, const CfgNode *Node,
                        bool IsLiveIn, CfgVector<SizeT> &LiveRegCount) {
   if (!BuildDefs::dump())
     return;
   Liveness *Liveness = Func->getLiveness();
   const LivenessBV *Live;
-  const int32_t StackReg = Func->getTarget()->getStackReg();
-  const int32_t FrameOrStackReg = Func->getTarget()->getFrameOrStackReg();
+  const RegNumT StackReg = Func->getTarget()->getStackReg();
+  const RegNumT FrameOrStackReg = Func->getTarget()->getFrameOrStackReg();
   if (IsLiveIn) {
     Live = &Liveness->getLiveIn(Node);
     Str << "\t\t\t\t/* LiveIn=";
   } else {
     Live = &Liveness->getLiveOut(Node);
     Str << "\t\t\t\t/* LiveOut=";
   }
   if (!Live->empty()) {
     CfgVector<Variable *> LiveRegs;
     for (SizeT i = 0; i < Live->size(); ++i) {
       if (!(*Live)[i])
         continue;
       Variable *Var = Liveness->getVariable(i, Node);
       if (!Var->hasReg())
         continue;
-      const int32_t RegNum = Var->getRegNum();
+      const RegNumT RegNum = Var->getRegNum();
       if (RegNum == StackReg || RegNum == FrameOrStackReg)
         continue;
       if (IsLiveIn)
         ++LiveRegCount[RegNum];
       LiveRegs.push_back(Var);
     }
     // Sort the variables by regnum so they are always printed in a familiar
     // order.
     std::sort(LiveRegs.begin(), LiveRegs.end(),
               [](const Variable *V1, const Variable *V2) {
-                return V1->getRegNum() < V2->getRegNum();
+                return unsigned(V1->getRegNum()) < unsigned(V2->getRegNum());
               });
     bool First = true;
     for (Variable *Var : LiveRegs) {
       if (!First)
         Str << ",";
       First = false;
       Var->emit(Func);
     }
   }
   Str << " */\n";
@@ skipping 470 matching lines @@
   auto *Instr = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Instr->addArg(AtomicRMWOp);
   Instr->addArg(Counter);
   Instr->addArg(One);
   Instr->addArg(OrderAcquireRelease);
   Insts.push_front(Instr);
 }
 
 } // end of namespace Ice