Subzero: Use a proper RegNumT type instead of int32_t/SizeT.

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 76 matching lines @@
   bool needSandboxing() const { return NeedSandboxing; }
 
   void translateOm1() override;
   void translateO2() override;
   void doLoadOpt();
   bool doBranchOpt(Inst *I, const CfgNode *NextNode) override;
 
   SizeT getNumRegisters() const override {
     return Traits::RegisterSet::Reg_NUM;
   }
-  Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override;
-  IceString getRegName(SizeT RegNum, Type Ty) const override;
+  Variable *getPhysicalRegister(RegNumT RegNum,
+                                Type Ty = IceType_void) override;
+  IceString getRegName(RegNumT RegNum, Type Ty) const override;
   static IceString getRegClassName(RegClass C) {
     auto ClassNum = static_cast<RegClassX86>(C);
     assert(ClassNum < RCX86_NUM);
     switch (ClassNum) {
     default:
       assert(C < RC_Target);
       return regClassString(C);
     case RCX86_Is64To8:
       return "i64to8"; // 64-bit GPR truncable to i8
     case RCX86_Is32To8:
@@ skipping 15 matching lines @@
     return TypeToRegisterSet[RC];
   }
 
   const llvm::SmallBitVector &
   getAllRegistersForVariable(const Variable *Var) const override {
     RegClass RC = Var->getRegClass();
     assert(static_cast<RegClassX86>(RC) < RCX86_NUM);
     return TypeToRegisterSetUnfiltered[RC];
   }
 
-  const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override {
-    assert(Reg < Traits::RegisterSet::Reg_NUM);
+  const llvm::SmallBitVector &
+  getAliasesForRegister(RegNumT Reg) const override {
+    Reg.assertIsValid();
     return RegisterAliases[Reg];
   }
 
   bool hasFramePointer() const override { return IsEbpBasedFrame; }
   void setHasFramePointer() override { IsEbpBasedFrame = true; }
-  SizeT getStackReg() const override { return Traits::StackPtr; }
-  SizeT getFrameReg() const override { return Traits::FramePtr; }
-  SizeT getFrameOrStackReg() const override {
+  RegNumT getStackReg() const override { return Traits::StackPtr; }
+  RegNumT getFrameReg() const override { return Traits::FramePtr; }
+  RegNumT getFrameOrStackReg() const override {
     return IsEbpBasedFrame ? getFrameReg() : getStackReg();
   }
   size_t typeWidthInBytesOnStack(Type Ty) const override {
     // Round up to the next multiple of WordType bytes.
     const uint32_t WordSizeInBytes = typeWidthInBytes(Traits::WordType);
     return Utils::applyAlignment(typeWidthInBytes(Ty), WordSizeInBytes);
   }
   uint32_t getStackAlignment() const override {
     return Traits::X86_STACK_ALIGNMENT_BYTES;
   }
@@ skipping 57 matching lines @@
   }
 
   void addProlog(CfgNode *Node) override;
   void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
                               size_t BasicFrameOffset, size_t StackAdjBytes,
                               size_t &InArgsSizeBytes);
   void addEpilog(CfgNode *Node) override;
   X86Address stackVarToAsmOperand(const Variable *Var) const;
 
   InstructionSetEnum getInstructionSet() const { return InstructionSet; }
-  Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister);
+  Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT::NoRegister);
 
 protected:
   const bool NeedSandboxing;
 
   explicit TargetX86Base(Cfg *Func);
 
   void postLower() override;
 
   /// Initializes the RebasePtr member variable -- if so required by
   /// SandboxingType for the concrete Target.
@@ skipping 148 matching lines @@
     Legal_Reg = 1 << 0, // physical register, not stack location
     Legal_Imm = 1 << 1,
     Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12]
     Legal_Rematerializable = 1 << 3,
     Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add RebasePtr
     Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs)
     // TODO(stichnot): Figure out whether this default works for x86-64.
   };
   using LegalMask = uint32_t;
   Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default,
-                    int32_t RegNum = Variable::NoRegister);
-  Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
+                    RegNumT RegNum = RegNumT::NoRegister);
+  Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT::NoRegister);
   /// Legalize the first source operand for use in the cmp instruction.
   Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1);
   /// Turn a pointer operand into a memory operand that can be used by a real
   /// load/store operation. Legalizes the operand as well. This is a nop if the
   /// operand is already a legal memory operand.
   X86OperandMem *formMemoryOperand(Operand *Ptr, Type Ty,
                                    bool DoLegalize = true);
 
-  Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister);
+  Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT::NoRegister);
   static Type stackSlotType();
 
   static constexpr uint32_t NoSizeLimit = 0;
   static const Type TypeForSize[];
   /// Returns the largest type which is equal to or larger than Size bytes. The
   /// type is suitable for copying memory i.e. a load and store will be a single
   /// instruction (for example x86 will get f64 not i64).
   static Type largestTypeInSize(uint32_t Size, uint32_t MaxSize = NoSizeLimit);
   /// Returns the smallest type which is equal to or larger than Size bytes. If
   /// one doesn't exist then the largest type smaller than Size bytes is
   /// returned. The type is suitable for memory copies as described at
   /// largestTypeInSize.
   static Type firstTypeThatFitsSize(uint32_t Size,
                                     uint32_t MaxSize = NoSizeLimit);
 
-  Variable *copyToReg8(Operand *Src, int32_t RegNum = Variable::NoRegister);
-  Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister);
+  Variable *copyToReg8(Operand *Src, RegNumT RegNum = RegNumT::NoRegister);
+  Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT::NoRegister);
 
   /// Returns a register containing all zeros, without affecting the FLAGS
   /// register, using the best instruction for the type.
-  Variable *makeZeroedRegister(Type Ty, int32_t RegNum = Variable::NoRegister);
+  Variable *makeZeroedRegister(Type Ty, RegNumT RegNum = RegNumT::NoRegister);
 
   /// \name Returns a vector in a register with the given constant entries.
   /// @{
-  Variable *makeVectorOfZeros(Type Ty, int32_t RegNum = Variable::NoRegister);
-  Variable *makeVectorOfOnes(Type Ty, int32_t RegNum = Variable::NoRegister);
+  Variable *makeVectorOfZeros(Type Ty, RegNumT RegNum = RegNumT::NoRegister);
+  Variable *makeVectorOfOnes(Type Ty, RegNumT RegNum = RegNumT::NoRegister);
   Variable *makeVectorOfMinusOnes(Type Ty,
-                                  int32_t RegNum = Variable::NoRegister);
+                                  RegNumT RegNum = RegNumT::NoRegister);
   Variable *makeVectorOfHighOrderBits(Type Ty,
-                                      int32_t RegNum = Variable::NoRegister);
-  Variable *makeVectorOfFabsMask(Type Ty,
-                                 int32_t RegNum = Variable::NoRegister);
+                                      RegNumT RegNum = RegNumT::NoRegister);
+  Variable *makeVectorOfFabsMask(Type Ty, RegNumT RegNum = RegNumT::NoRegister);
   /// @}
 
   /// Return a memory operand corresponding to a stack allocated Variable.
   X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
                                               uint32_t Offset = 0);
 
   void
-  makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation,
+  makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
                                 const llvm::SmallBitVector &ExcludeRegisters,
                                 uint64_t Salt) const override;
 
   /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the
   /// instruction's operand is a memory reference. This is only needed for
   /// x86-64 NaCl sandbox.
   template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None>
   class AutoMemorySandboxer {
     AutoMemorySandboxer() = delete;
     AutoMemorySandboxer(const AutoMemorySandboxer &) = delete;
@@ skipping 217 matching lines @@
   /// Moves can be used to redefine registers, creating "partial kills" for
   /// liveness.  Mark where moves are used in this way.
   void _redefined(Inst *MovInst, bool IsRedefinition = true) {
     if (IsRedefinition)
       MovInst->setDestRedefined();
   }
   /// If Dest=nullptr is passed in, then a new variable is created, marked as
   /// infinite register allocation weight, and returned through the in/out Dest
   /// argument.
   typename Traits::Insts::Mov *_mov(Variable *&Dest, Operand *Src0,
-                                    int32_t RegNum = Variable::NoRegister) {
+                                    RegNumT RegNum = RegNumT::NoRegister) {
     if (Dest == nullptr)
       Dest = makeReg(Src0->getType(), RegNum);
     AutoMemorySandboxer<> _(this, &Dest, &Src0);
     return Context.insert<typename Traits::Insts::Mov>(Dest, Src0);
   }
   void _mov_sp(Operand *NewValue) {
     dispatchToConcrete(&Traits::ConcreteTarget::_mov_sp, std::move(NewValue));
   }
   typename Traits::Insts::Movp *_movp(Variable *Dest, Operand *Src0) {
     AutoMemorySandboxer<> _(this, &Dest, &Src0);
@@ skipping 303 matching lines @@
   static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM>
       RegisterAliases;
   llvm::SmallBitVector RegsUsed;
   std::array<VarList, IceType_NUM> PhysicalRegisters;
   // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the
   // current sandboxing type.
   Variable *RebasePtr = nullptr;
 
   /// Randomize a given immediate operand
   Operand *randomizeOrPoolImmediate(Constant *Immediate,
-                                    int32_t RegNum = Variable::NoRegister);
-  X86OperandMem *
-  randomizeOrPoolImmediate(X86OperandMem *MemOperand,
-                           int32_t RegNum = Variable::NoRegister);
+                                    RegNumT RegNum = RegNumT::NoRegister);
+  X86OperandMem *randomizeOrPoolImmediate(X86OperandMem *MemOperand,
+                                          RegNumT RegNum = RegNumT::NoRegister);
   bool RandomizationPoolingPaused = false;
 
 private:
   /// dispatchToConcrete is the template voodoo that allows TargetX86Base to
   /// invoke methods in Machine (which inherits from TargetX86Base) without
   /// having to rely on virtual method calls. There are two overloads, one for
   /// non-void types, and one for void types. We need this becase, for non-void
   /// types, we need to return the method result, where as for void, we don't.
   /// While it is true that the code compiles without the void "version", there
   /// used to be a time when compilers would reject such code.
@@ skipping 109 matching lines @@
 
   explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {}
 };
 
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H