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1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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87 bool needSandboxing() const { return NeedSandboxing; } | 87 bool needSandboxing() const { return NeedSandboxing; } |
88 | 88 |
89 void translateOm1() override; | 89 void translateOm1() override; |
90 void translateO2() override; | 90 void translateO2() override; |
91 void doLoadOpt(); | 91 void doLoadOpt(); |
92 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; | 92 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; |
93 | 93 |
94 SizeT getNumRegisters() const override { | 94 SizeT getNumRegisters() const override { |
95 return Traits::RegisterSet::Reg_NUM; | 95 return Traits::RegisterSet::Reg_NUM; |
96 } | 96 } |
97 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; | 97 Variable *getPhysicalRegister(RegNumT RegNum, |
98 IceString getRegName(SizeT RegNum, Type Ty) const override; | 98 Type Ty = IceType_void) override; |
| 99 IceString getRegName(RegNumT RegNum, Type Ty) const override; |
99 static IceString getRegClassName(RegClass C) { | 100 static IceString getRegClassName(RegClass C) { |
100 auto ClassNum = static_cast<RegClassX86>(C); | 101 auto ClassNum = static_cast<RegClassX86>(C); |
101 assert(ClassNum < RCX86_NUM); | 102 assert(ClassNum < RCX86_NUM); |
102 switch (ClassNum) { | 103 switch (ClassNum) { |
103 default: | 104 default: |
104 assert(C < RC_Target); | 105 assert(C < RC_Target); |
105 return regClassString(C); | 106 return regClassString(C); |
106 case RCX86_Is64To8: | 107 case RCX86_Is64To8: |
107 return "i64to8"; // 64-bit GPR truncable to i8 | 108 return "i64to8"; // 64-bit GPR truncable to i8 |
108 case RCX86_Is32To8: | 109 case RCX86_Is32To8: |
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124 return TypeToRegisterSet[RC]; | 125 return TypeToRegisterSet[RC]; |
125 } | 126 } |
126 | 127 |
127 const llvm::SmallBitVector & | 128 const llvm::SmallBitVector & |
128 getAllRegistersForVariable(const Variable *Var) const override { | 129 getAllRegistersForVariable(const Variable *Var) const override { |
129 RegClass RC = Var->getRegClass(); | 130 RegClass RC = Var->getRegClass(); |
130 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); | 131 assert(static_cast<RegClassX86>(RC) < RCX86_NUM); |
131 return TypeToRegisterSetUnfiltered[RC]; | 132 return TypeToRegisterSetUnfiltered[RC]; |
132 } | 133 } |
133 | 134 |
134 const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override { | 135 const llvm::SmallBitVector & |
135 assert(Reg < Traits::RegisterSet::Reg_NUM); | 136 getAliasesForRegister(RegNumT Reg) const override { |
| 137 Reg.assertIsValid(); |
136 return RegisterAliases[Reg]; | 138 return RegisterAliases[Reg]; |
137 } | 139 } |
138 | 140 |
139 bool hasFramePointer() const override { return IsEbpBasedFrame; } | 141 bool hasFramePointer() const override { return IsEbpBasedFrame; } |
140 void setHasFramePointer() override { IsEbpBasedFrame = true; } | 142 void setHasFramePointer() override { IsEbpBasedFrame = true; } |
141 SizeT getStackReg() const override { return Traits::StackPtr; } | 143 RegNumT getStackReg() const override { return Traits::StackPtr; } |
142 SizeT getFrameReg() const override { return Traits::FramePtr; } | 144 RegNumT getFrameReg() const override { return Traits::FramePtr; } |
143 SizeT getFrameOrStackReg() const override { | 145 RegNumT getFrameOrStackReg() const override { |
144 return IsEbpBasedFrame ? getFrameReg() : getStackReg(); | 146 return IsEbpBasedFrame ? getFrameReg() : getStackReg(); |
145 } | 147 } |
146 size_t typeWidthInBytesOnStack(Type Ty) const override { | 148 size_t typeWidthInBytesOnStack(Type Ty) const override { |
147 // Round up to the next multiple of WordType bytes. | 149 // Round up to the next multiple of WordType bytes. |
148 const uint32_t WordSizeInBytes = typeWidthInBytes(Traits::WordType); | 150 const uint32_t WordSizeInBytes = typeWidthInBytes(Traits::WordType); |
149 return Utils::applyAlignment(typeWidthInBytes(Ty), WordSizeInBytes); | 151 return Utils::applyAlignment(typeWidthInBytes(Ty), WordSizeInBytes); |
150 } | 152 } |
151 uint32_t getStackAlignment() const override { | 153 uint32_t getStackAlignment() const override { |
152 return Traits::X86_STACK_ALIGNMENT_BYTES; | 154 return Traits::X86_STACK_ALIGNMENT_BYTES; |
153 } | 155 } |
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211 } | 213 } |
212 | 214 |
213 void addProlog(CfgNode *Node) override; | 215 void addProlog(CfgNode *Node) override; |
214 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, | 216 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, |
215 size_t BasicFrameOffset, size_t StackAdjBytes, | 217 size_t BasicFrameOffset, size_t StackAdjBytes, |
216 size_t &InArgsSizeBytes); | 218 size_t &InArgsSizeBytes); |
217 void addEpilog(CfgNode *Node) override; | 219 void addEpilog(CfgNode *Node) override; |
218 X86Address stackVarToAsmOperand(const Variable *Var) const; | 220 X86Address stackVarToAsmOperand(const Variable *Var) const; |
219 | 221 |
220 InstructionSetEnum getInstructionSet() const { return InstructionSet; } | 222 InstructionSetEnum getInstructionSet() const { return InstructionSet; } |
221 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); | 223 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT::NoRegister); |
222 | 224 |
223 protected: | 225 protected: |
224 const bool NeedSandboxing; | 226 const bool NeedSandboxing; |
225 | 227 |
226 explicit TargetX86Base(Cfg *Func); | 228 explicit TargetX86Base(Cfg *Func); |
227 | 229 |
228 void postLower() override; | 230 void postLower() override; |
229 | 231 |
230 /// Initializes the RebasePtr member variable -- if so required by | 232 /// Initializes the RebasePtr member variable -- if so required by |
231 /// SandboxingType for the concrete Target. | 233 /// SandboxingType for the concrete Target. |
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380 Legal_Reg = 1 << 0, // physical register, not stack location | 382 Legal_Reg = 1 << 0, // physical register, not stack location |
381 Legal_Imm = 1 << 1, | 383 Legal_Imm = 1 << 1, |
382 Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12] | 384 Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12] |
383 Legal_Rematerializable = 1 << 3, | 385 Legal_Rematerializable = 1 << 3, |
384 Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add RebasePtr | 386 Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add RebasePtr |
385 Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs) | 387 Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs) |
386 // TODO(stichnot): Figure out whether this default works for x86-64. | 388 // TODO(stichnot): Figure out whether this default works for x86-64. |
387 }; | 389 }; |
388 using LegalMask = uint32_t; | 390 using LegalMask = uint32_t; |
389 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, | 391 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, |
390 int32_t RegNum = Variable::NoRegister); | 392 RegNumT RegNum = RegNumT::NoRegister); |
391 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister); | 393 Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT::NoRegister); |
392 /// Legalize the first source operand for use in the cmp instruction. | 394 /// Legalize the first source operand for use in the cmp instruction. |
393 Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1); | 395 Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1); |
394 /// Turn a pointer operand into a memory operand that can be used by a real | 396 /// Turn a pointer operand into a memory operand that can be used by a real |
395 /// load/store operation. Legalizes the operand as well. This is a nop if the | 397 /// load/store operation. Legalizes the operand as well. This is a nop if the |
396 /// operand is already a legal memory operand. | 398 /// operand is already a legal memory operand. |
397 X86OperandMem *formMemoryOperand(Operand *Ptr, Type Ty, | 399 X86OperandMem *formMemoryOperand(Operand *Ptr, Type Ty, |
398 bool DoLegalize = true); | 400 bool DoLegalize = true); |
399 | 401 |
400 Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister); | 402 Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT::NoRegister); |
401 static Type stackSlotType(); | 403 static Type stackSlotType(); |
402 | 404 |
403 static constexpr uint32_t NoSizeLimit = 0; | 405 static constexpr uint32_t NoSizeLimit = 0; |
404 static const Type TypeForSize[]; | 406 static const Type TypeForSize[]; |
405 /// Returns the largest type which is equal to or larger than Size bytes. The | 407 /// Returns the largest type which is equal to or larger than Size bytes. The |
406 /// type is suitable for copying memory i.e. a load and store will be a single | 408 /// type is suitable for copying memory i.e. a load and store will be a single |
407 /// instruction (for example x86 will get f64 not i64). | 409 /// instruction (for example x86 will get f64 not i64). |
408 static Type largestTypeInSize(uint32_t Size, uint32_t MaxSize = NoSizeLimit); | 410 static Type largestTypeInSize(uint32_t Size, uint32_t MaxSize = NoSizeLimit); |
409 /// Returns the smallest type which is equal to or larger than Size bytes. If | 411 /// Returns the smallest type which is equal to or larger than Size bytes. If |
410 /// one doesn't exist then the largest type smaller than Size bytes is | 412 /// one doesn't exist then the largest type smaller than Size bytes is |
411 /// returned. The type is suitable for memory copies as described at | 413 /// returned. The type is suitable for memory copies as described at |
412 /// largestTypeInSize. | 414 /// largestTypeInSize. |
413 static Type firstTypeThatFitsSize(uint32_t Size, | 415 static Type firstTypeThatFitsSize(uint32_t Size, |
414 uint32_t MaxSize = NoSizeLimit); | 416 uint32_t MaxSize = NoSizeLimit); |
415 | 417 |
416 Variable *copyToReg8(Operand *Src, int32_t RegNum = Variable::NoRegister); | 418 Variable *copyToReg8(Operand *Src, RegNumT RegNum = RegNumT::NoRegister); |
417 Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister); | 419 Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT::NoRegister); |
418 | 420 |
419 /// Returns a register containing all zeros, without affecting the FLAGS | 421 /// Returns a register containing all zeros, without affecting the FLAGS |
420 /// register, using the best instruction for the type. | 422 /// register, using the best instruction for the type. |
421 Variable *makeZeroedRegister(Type Ty, int32_t RegNum = Variable::NoRegister); | 423 Variable *makeZeroedRegister(Type Ty, RegNumT RegNum = RegNumT::NoRegister); |
422 | 424 |
423 /// \name Returns a vector in a register with the given constant entries. | 425 /// \name Returns a vector in a register with the given constant entries. |
424 /// @{ | 426 /// @{ |
425 Variable *makeVectorOfZeros(Type Ty, int32_t RegNum = Variable::NoRegister); | 427 Variable *makeVectorOfZeros(Type Ty, RegNumT RegNum = RegNumT::NoRegister); |
426 Variable *makeVectorOfOnes(Type Ty, int32_t RegNum = Variable::NoRegister); | 428 Variable *makeVectorOfOnes(Type Ty, RegNumT RegNum = RegNumT::NoRegister); |
427 Variable *makeVectorOfMinusOnes(Type Ty, | 429 Variable *makeVectorOfMinusOnes(Type Ty, |
428 int32_t RegNum = Variable::NoRegister); | 430 RegNumT RegNum = RegNumT::NoRegister); |
429 Variable *makeVectorOfHighOrderBits(Type Ty, | 431 Variable *makeVectorOfHighOrderBits(Type Ty, |
430 int32_t RegNum = Variable::NoRegister); | 432 RegNumT RegNum = RegNumT::NoRegister); |
431 Variable *makeVectorOfFabsMask(Type Ty, | 433 Variable *makeVectorOfFabsMask(Type Ty, RegNumT RegNum = RegNumT::NoRegister); |
432 int32_t RegNum = Variable::NoRegister); | |
433 /// @} | 434 /// @} |
434 | 435 |
435 /// Return a memory operand corresponding to a stack allocated Variable. | 436 /// Return a memory operand corresponding to a stack allocated Variable. |
436 X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot, | 437 X86OperandMem *getMemoryOperandForStackSlot(Type Ty, Variable *Slot, |
437 uint32_t Offset = 0); | 438 uint32_t Offset = 0); |
438 | 439 |
439 void | 440 void |
440 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation, | 441 makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation, |
441 const llvm::SmallBitVector &ExcludeRegisters, | 442 const llvm::SmallBitVector &ExcludeRegisters, |
442 uint64_t Salt) const override; | 443 uint64_t Salt) const override; |
443 | 444 |
444 /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the | 445 /// AutoMemorySandboxer emits a bundle-lock/bundle-unlock pair if the |
445 /// instruction's operand is a memory reference. This is only needed for | 446 /// instruction's operand is a memory reference. This is only needed for |
446 /// x86-64 NaCl sandbox. | 447 /// x86-64 NaCl sandbox. |
447 template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None> | 448 template <InstBundleLock::Option BundleLockOpt = InstBundleLock::Opt_None> |
448 class AutoMemorySandboxer { | 449 class AutoMemorySandboxer { |
449 AutoMemorySandboxer() = delete; | 450 AutoMemorySandboxer() = delete; |
450 AutoMemorySandboxer(const AutoMemorySandboxer &) = delete; | 451 AutoMemorySandboxer(const AutoMemorySandboxer &) = delete; |
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668 /// Moves can be used to redefine registers, creating "partial kills" for | 669 /// Moves can be used to redefine registers, creating "partial kills" for |
669 /// liveness. Mark where moves are used in this way. | 670 /// liveness. Mark where moves are used in this way. |
670 void _redefined(Inst *MovInst, bool IsRedefinition = true) { | 671 void _redefined(Inst *MovInst, bool IsRedefinition = true) { |
671 if (IsRedefinition) | 672 if (IsRedefinition) |
672 MovInst->setDestRedefined(); | 673 MovInst->setDestRedefined(); |
673 } | 674 } |
674 /// If Dest=nullptr is passed in, then a new variable is created, marked as | 675 /// If Dest=nullptr is passed in, then a new variable is created, marked as |
675 /// infinite register allocation weight, and returned through the in/out Dest | 676 /// infinite register allocation weight, and returned through the in/out Dest |
676 /// argument. | 677 /// argument. |
677 typename Traits::Insts::Mov *_mov(Variable *&Dest, Operand *Src0, | 678 typename Traits::Insts::Mov *_mov(Variable *&Dest, Operand *Src0, |
678 int32_t RegNum = Variable::NoRegister) { | 679 RegNumT RegNum = RegNumT::NoRegister) { |
679 if (Dest == nullptr) | 680 if (Dest == nullptr) |
680 Dest = makeReg(Src0->getType(), RegNum); | 681 Dest = makeReg(Src0->getType(), RegNum); |
681 AutoMemorySandboxer<> _(this, &Dest, &Src0); | 682 AutoMemorySandboxer<> _(this, &Dest, &Src0); |
682 return Context.insert<typename Traits::Insts::Mov>(Dest, Src0); | 683 return Context.insert<typename Traits::Insts::Mov>(Dest, Src0); |
683 } | 684 } |
684 void _mov_sp(Operand *NewValue) { | 685 void _mov_sp(Operand *NewValue) { |
685 dispatchToConcrete(&Traits::ConcreteTarget::_mov_sp, std::move(NewValue)); | 686 dispatchToConcrete(&Traits::ConcreteTarget::_mov_sp, std::move(NewValue)); |
686 } | 687 } |
687 typename Traits::Insts::Movp *_movp(Variable *Dest, Operand *Src0) { | 688 typename Traits::Insts::Movp *_movp(Variable *Dest, Operand *Src0) { |
688 AutoMemorySandboxer<> _(this, &Dest, &Src0); | 689 AutoMemorySandboxer<> _(this, &Dest, &Src0); |
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992 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> | 993 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> |
993 RegisterAliases; | 994 RegisterAliases; |
994 llvm::SmallBitVector RegsUsed; | 995 llvm::SmallBitVector RegsUsed; |
995 std::array<VarList, IceType_NUM> PhysicalRegisters; | 996 std::array<VarList, IceType_NUM> PhysicalRegisters; |
996 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the | 997 // RebasePtr is a Variable that holds the Rebasing pointer (if any) for the |
997 // current sandboxing type. | 998 // current sandboxing type. |
998 Variable *RebasePtr = nullptr; | 999 Variable *RebasePtr = nullptr; |
999 | 1000 |
1000 /// Randomize a given immediate operand | 1001 /// Randomize a given immediate operand |
1001 Operand *randomizeOrPoolImmediate(Constant *Immediate, | 1002 Operand *randomizeOrPoolImmediate(Constant *Immediate, |
1002 int32_t RegNum = Variable::NoRegister); | 1003 RegNumT RegNum = RegNumT::NoRegister); |
1003 X86OperandMem * | 1004 X86OperandMem *randomizeOrPoolImmediate(X86OperandMem *MemOperand, |
1004 randomizeOrPoolImmediate(X86OperandMem *MemOperand, | 1005 RegNumT RegNum = RegNumT::NoRegister); |
1005 int32_t RegNum = Variable::NoRegister); | |
1006 bool RandomizationPoolingPaused = false; | 1006 bool RandomizationPoolingPaused = false; |
1007 | 1007 |
1008 private: | 1008 private: |
1009 /// dispatchToConcrete is the template voodoo that allows TargetX86Base to | 1009 /// dispatchToConcrete is the template voodoo that allows TargetX86Base to |
1010 /// invoke methods in Machine (which inherits from TargetX86Base) without | 1010 /// invoke methods in Machine (which inherits from TargetX86Base) without |
1011 /// having to rely on virtual method calls. There are two overloads, one for | 1011 /// having to rely on virtual method calls. There are two overloads, one for |
1012 /// non-void types, and one for void types. We need this becase, for non-void | 1012 /// non-void types, and one for void types. We need this becase, for non-void |
1013 /// types, we need to return the method result, where as for void, we don't. | 1013 /// types, we need to return the method result, where as for void, we don't. |
1014 /// While it is true that the code compiles without the void "version", there | 1014 /// While it is true that the code compiles without the void "version", there |
1015 /// used to be a time when compilers would reject such code. | 1015 /// used to be a time when compilers would reject such code. |
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1125 | 1125 |
1126 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} | 1126 explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {} |
1127 }; | 1127 }; |
1128 | 1128 |
1129 } // end of namespace X86NAMESPACE | 1129 } // end of namespace X86NAMESPACE |
1130 } // end of namespace Ice | 1130 } // end of namespace Ice |
1131 | 1131 |
1132 #include "IceTargetLoweringX86BaseImpl.h" | 1132 #include "IceTargetLoweringX86BaseImpl.h" |
1133 | 1133 |
1134 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 1134 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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