Subzero: Use a proper RegNumT type instead of int32_t/SizeT.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 59 matching lines @@
     // Add handling of new register classes below.
   }
 }
 
 } // end of anonymous namespace
 
 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {}
 
 void TargetMIPS32::staticInit(GlobalContext *Ctx) {
   (void)Ctx;
+  RegNumT::setLimit(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM);
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
   IntegerRegisters[RegMIPS32::val] = isInt;                                    \
   I64PairRegisters[RegMIPS32::val] = isI64Pair;                                \
@@ skipping 193 matching lines @@
 const char *RegNames[RegMIPS32::Reg_NUM] = {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
   name,
     REGMIPS32_TABLE
 #undef X
 };
 
 } // end of anonymous namespace
 
-const char *RegMIPS32::getRegName(int32_t RegNum) {
-  assert(RegNum < RegMIPS32::Reg_NUM);
+const char *RegMIPS32::getRegName(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegNames[RegNum];
 }
 
-IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const {
+IceString TargetMIPS32::getRegName(RegNumT RegNum, Type Ty) const {
   (void)Ty;
   return RegMIPS32::getRegName(RegNum);
 }
 
-Variable *TargetMIPS32::getPhysicalRegister(SizeT RegNum, Type Ty) {
+Variable *TargetMIPS32::getPhysicalRegister(RegNumT RegNum, Type Ty) {
   if (Ty == IceType_void)
     Ty = IceType_i32;
   if (PhysicalRegisters[Ty].empty())
     PhysicalRegisters[Ty].resize(RegMIPS32::Reg_NUM);
-  assert(RegNum < PhysicalRegisters[Ty].size());
+  RegNum.assertIsValid();
   Variable *Reg = PhysicalRegisters[Ty][RegNum];
   if (Reg == nullptr) {
     Reg = Func->makeVariable(Ty);
     Reg->setRegNum(RegNum);
     PhysicalRegisters[Ty][RegNum] = Reg;
     // Specially mark a named physical register as an "argument" so that it is
     // considered live upon function entry.  Otherwise it's possible to get
     // liveness validation errors for saving callee-save registers.
     Func->addImplicitArg(Reg);
     // Don't bother tracking the live range of a named physical register.
     Reg->setIgnoreLiveness();
   }
   return Reg;
 }
 
 void TargetMIPS32::emitJumpTable(const Cfg *Func,
                                  const InstJumpTable *JumpTable) const {
   (void)JumpTable;
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 /// Provide a trivial wrapper to legalize() for this common usage.
-Variable *TargetMIPS32::legalizeToReg(Operand *From, int32_t RegNum) {
+Variable *TargetMIPS32::legalizeToReg(Operand *From, RegNumT RegNum) {
   return llvm::cast<Variable>(legalize(From, Legal_Reg, RegNum));
 }
 
 /// Legalize undef values to concrete values.
-Operand *TargetMIPS32::legalizeUndef(Operand *From, int32_t RegNum) {
+Operand *TargetMIPS32::legalizeUndef(Operand *From, RegNumT RegNum) {
   (void)RegNum;
   Type Ty = From->getType();
   if (llvm::isa<ConstantUndef>(From)) {
     // Lower undefs to zero.  Another option is to lower undefs to an
     // uninitialized register; however, using an uninitialized register
     // results in less predictable code.
     //
     // If in the future the implementation is changed to lower undef
     // values to uninitialized registers, a FakeDef will be needed:
     //     Context.insert(InstFakeDef::create(Func, Reg));
     // This is in order to ensure that the live range of Reg is not
     // overestimated.  If the constant being lowered is a 64 bit value,
     // then the result should be split and the lo and hi components will
     // need to go in uninitialized registers.
     if (isVectorType(Ty))
       UnimplementedError(Func->getContext()->getFlags());
     return Ctx->getConstantZero(Ty);
   }
   return From;
 }
 
-Variable *TargetMIPS32::makeReg(Type Type, int32_t RegNum) {
+Variable *TargetMIPS32::makeReg(Type Type, RegNumT RegNum) {
   // There aren't any 64-bit integer registers for Mips32.
   assert(Type != IceType_i64);
   Variable *Reg = Func->makeVariable(Type);
-  if (RegNum == Variable::NoRegister)
+  if (RegNum == RegNumT::NoRegister)
     Reg->setMustHaveReg();
   else
     Reg->setRegNum(RegNum);
   return Reg;
 }
 
 void TargetMIPS32::emitVariable(const Variable *Var) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Ctx->getStrEmit();
@@ skipping 30 matching lines @@
       UnimplementedError(Func->getContext()->getFlags());
       continue;
     }
     if (isFloatingType(Ty)) {
       UnimplementedError(Func->getContext()->getFlags());
       continue;
     }
     if (Ty == IceType_i64) {
       if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG)
         continue;
-      int32_t RegLo = RegMIPS32::Reg_A0 + NumGPRRegsUsed;
-      int32_t RegHi = RegLo + 1;
+      auto RegLo = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed);
+      auto RegHi = RegNumT::fixme(RegLo + 1);
       ++NumGPRRegsUsed;
       // Always start i64 registers at an even register, so this may end
       // up padding away a register.
       if (RegLo % 2 != 0) {
-        ++RegLo;
+        RegLo = RegNumT::fixme(RegLo + 1);
         ++NumGPRRegsUsed;
       }
       // If this leaves us without room to consume another register,
       // leave any previously speculatively consumed registers as consumed.
       if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG)
         continue;
-      // RegHi = RegMIPS32::Reg_A0 + NumGPRRegsUsed;
+      // RegHi = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed);
       ++NumGPRRegsUsed;
       Variable *RegisterArg = Func->makeVariable(Ty);
       auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg);
       if (BuildDefs::dump())
         RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName(Func));
       RegisterArg64On32->initHiLo(Func);
       RegisterArg64On32->setIsArg();
       RegisterArg64On32->getLo()->setRegNum(RegLo);
       RegisterArg64On32->getHi()->setRegNum(RegHi);
       Arg->setIsArg(false);
       Args[I] = RegisterArg64On32;
       Context.insert<InstAssign>(Arg, RegisterArg);
       continue;
     } else {
       assert(Ty == IceType_i32);
       if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG)
         continue;
-      int32_t RegNum = RegMIPS32::Reg_A0 + NumGPRRegsUsed;
+      const auto RegNum = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed);
       ++NumGPRRegsUsed;
       Variable *RegisterArg = Func->makeVariable(Ty);
       if (BuildDefs::dump()) {
         RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func));
       }
       RegisterArg->setRegNum(RegNum);
       RegisterArg->setIsArg();
       Arg->setIsArg(false);
       Args[I] = RegisterArg;
       Context.insert<InstAssign>(Arg, RegisterArg);
@@ skipping 694 matching lines @@
 
 void TargetMIPS32::postLower() {
   if (Ctx->getFlags().getOptLevel() == Opt_m1)
     return;
   // TODO(rkotler): Find two-address non-SSA instructions where Dest==Src0,
   // and set the IsDestRedefined flag to keep liveness analysis consistent.
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::makeRandomRegisterPermutation(
-    llvm::SmallVectorImpl<int32_t> &Permutation,
+    llvm::SmallVectorImpl<RegNumT> &Permutation,
     const llvm::SmallBitVector &ExcludeRegisters, uint64_t Salt) const {
   (void)Permutation;
   (void)ExcludeRegisters;
   (void)Salt;
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 /* TODO(jvoung): avoid duplicate symbols with multiple targets.
 void ConstantUndef::emitWithoutDollar(GlobalContext *) const {
   llvm_unreachable("Not expecting to emitWithoutDollar undef");
@@ skipping 36 matching lines @@
 }
 
 void TargetDataMIPS32::lowerJumpTables() {
   if (Ctx->getFlags().getDisableTranslation())
     return;
   UnimplementedError(Ctx->getFlags());
 }
 
 // Helper for legalize() to emit the right code to lower an operand to a
 // register of the appropriate type.
-Variable *TargetMIPS32::copyToReg(Operand *Src, int32_t RegNum) {
+Variable *TargetMIPS32::copyToReg(Operand *Src, RegNumT RegNum) {
   Type Ty = Src->getType();
   Variable *Reg = makeReg(Ty, RegNum);
   if (isVectorType(Ty) || isFloatingType(Ty)) {
     UnimplementedError(Ctx->getFlags());
   } else {
     // Mov's Src operand can really only be the flexible second operand type
     // or a register. Users should guarantee that.
     _mov(Reg, Src);
   }
   return Reg;
 }
 
 Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed,
-                                int32_t RegNum) {
+                                RegNumT RegNum) {
   Type Ty = From->getType();
   // Assert that a physical register is allowed.  To date, all calls
   // to legalize() allow a physical register. Legal_Flex converts
   // registers to the right type OperandMIPS32FlexReg as needed.
   assert(Allowed & Legal_Reg);
   // Go through the various types of operands:
   // OperandMIPS32Mem, Constant, and Variable.
   // Given the above assertion, if type of operand is not legal
   // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy
   // to a register.
   if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) {
     (void)C;
     // TODO(reed kotler): complete this case for proper implementation
     Variable *Reg = makeReg(Ty, RegNum);
     Context.insert<InstFakeDef>(Reg);
     return Reg;
   } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) {
     const uint32_t Value = C32->getValue();
     // Check if the immediate will fit in a Flexible second operand,
     // if a Flexible second operand is allowed. We need to know the exact
     // value, so that rules out relocatable constants.
     // Also try the inverse and use MVN if possible.
     // Do a movw/movt to a register.
     Variable *Reg;
-    if (RegNum == Variable::NoRegister)
+    if (RegNum == RegNumT::NoRegister)
       Reg = makeReg(Ty, RegNum);
     else
       Reg = getPhysicalRegister(RegNum);
     if (isInt<16>(int32_t(Value))) {
       Variable *Zero = getPhysicalRegister(RegMIPS32::Reg_ZERO, Ty);
       Context.insert<InstFakeDef>(Zero);
       _addiu(Reg, Zero, Value);
     } else {
       uint32_t UpperBits = (Value >> 16) & 0xFFFF;
       (void)UpperBits;
       uint32_t LowerBits = Value & 0xFFFF;
       Variable *TReg = makeReg(Ty, RegNum);
       _lui(TReg, UpperBits);
       _ori(Reg, TReg, LowerBits);
     }
     return Reg;
   }
   if (auto *Var = llvm::dyn_cast<Variable>(From)) {
     // Check if the variable is guaranteed a physical register.  This
     // can happen either when the variable is pre-colored or when it is
     // assigned infinite weight.
     bool MustHaveRegister = (Var->hasReg() || Var->mustHaveReg());
     // We need a new physical register for the operand if:
     //   Mem is not allowed and Var isn't guaranteed a physical
     //   register, or
     //   RegNum is required and Var->getRegNum() doesn't match.
     if ((!(Allowed & Legal_Mem) && !MustHaveRegister) ||
-        (RegNum != Variable::NoRegister && RegNum != Var->getRegNum())) {
+        (RegNum != RegNumT::NoRegister && RegNum != Var->getRegNum())) {
       From = copyToReg(From, RegNum);
     }
     return From;
   }
   return From;
 }
 
 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx)
     : TargetHeaderLowering(Ctx) {}
 
 void TargetHeaderMIPS32::lower() {
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.set\t"
       << "nomicromips\n";
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice