Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(403)

Side by Side Diff: src/IceTargetLowering.h

Issue 1676123002: Subzero: Use a proper RegNumT type instead of int32_t/SizeT. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Make it possible to do "auto NewReg = RegNumT::NoRegister;" Created 4 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceRegistersX8632.h ('k') | src/IceTargetLowering.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===// 1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 215 matching lines...) Expand 10 before | Expand all | Expand 10 after
226 /// some optimization was done. 226 /// some optimization was done.
227 virtual bool doBranchOpt(Inst * /*I*/, const CfgNode * /*NextNode*/) { 227 virtual bool doBranchOpt(Inst * /*I*/, const CfgNode * /*NextNode*/) {
228 return false; 228 return false;
229 } 229 }
230 230
231 virtual SizeT getNumRegisters() const = 0; 231 virtual SizeT getNumRegisters() const = 0;
232 /// Returns a variable pre-colored to the specified physical register. This is 232 /// Returns a variable pre-colored to the specified physical register. This is
233 /// generally used to get very direct access to the register such as in the 233 /// generally used to get very direct access to the register such as in the
234 /// prolog or epilog or for marking scratch registers as killed by a call. If 234 /// prolog or epilog or for marking scratch registers as killed by a call. If
235 /// a Type is not provided, a target-specific default type is used. 235 /// a Type is not provided, a target-specific default type is used.
236 virtual Variable *getPhysicalRegister(SizeT RegNum, 236 virtual Variable *getPhysicalRegister(RegNumT RegNum,
237 Type Ty = IceType_void) = 0; 237 Type Ty = IceType_void) = 0;
238 /// Returns a printable name for the register. 238 /// Returns a printable name for the register.
239 virtual IceString getRegName(SizeT RegNum, Type Ty) const = 0; 239 virtual IceString getRegName(RegNumT RegNum, Type Ty) const = 0;
240 240
241 virtual bool hasFramePointer() const { return false; } 241 virtual bool hasFramePointer() const { return false; }
242 virtual void setHasFramePointer() = 0; 242 virtual void setHasFramePointer() = 0;
243 virtual SizeT getStackReg() const = 0; 243 virtual RegNumT getStackReg() const = 0;
244 virtual SizeT getFrameReg() const = 0; 244 virtual RegNumT getFrameReg() const = 0;
245 virtual SizeT getFrameOrStackReg() const = 0; 245 virtual RegNumT getFrameOrStackReg() const = 0;
246 virtual size_t typeWidthInBytesOnStack(Type Ty) const = 0; 246 virtual size_t typeWidthInBytesOnStack(Type Ty) const = 0;
247 virtual uint32_t getStackAlignment() const = 0; 247 virtual uint32_t getStackAlignment() const = 0;
248 virtual void reserveFixedAllocaArea(size_t Size, size_t Align) = 0; 248 virtual void reserveFixedAllocaArea(size_t Size, size_t Align) = 0;
249 virtual int32_t getFrameFixedAllocaOffset() const = 0; 249 virtual int32_t getFrameFixedAllocaOffset() const = 0;
250 virtual uint32_t maxOutArgsSizeBytes() const { return 0; } 250 virtual uint32_t maxOutArgsSizeBytes() const { return 0; }
251 251
252 /// Return whether a 64-bit Variable should be split into a Variable64On32. 252 /// Return whether a 64-bit Variable should be split into a Variable64On32.
253 virtual bool shouldSplitToVariable64On32(Type Ty) const = 0; 253 virtual bool shouldSplitToVariable64On32(Type Ty) const = 0;
254 254
255 bool hasComputedFrame() const { return HasComputedFrame; } 255 bool hasComputedFrame() const { return HasComputedFrame; }
(...skipping 21 matching lines...) Expand all
277 RegSetMask Exclude) const = 0; 277 RegSetMask Exclude) const = 0;
278 /// Get the set of physical registers available for the specified Variable's 278 /// Get the set of physical registers available for the specified Variable's
279 /// register class, applying register restrictions from the command line. 279 /// register class, applying register restrictions from the command line.
280 virtual const llvm::SmallBitVector & 280 virtual const llvm::SmallBitVector &
281 getRegistersForVariable(const Variable *Var) const = 0; 281 getRegistersForVariable(const Variable *Var) const = 0;
282 /// Get the set of *all* physical registers available for the specified 282 /// Get the set of *all* physical registers available for the specified
283 /// Variable's register class, *not* applying register restrictions from the 283 /// Variable's register class, *not* applying register restrictions from the
284 /// command line. 284 /// command line.
285 virtual const llvm::SmallBitVector & 285 virtual const llvm::SmallBitVector &
286 getAllRegistersForVariable(const Variable *Var) const = 0; 286 getAllRegistersForVariable(const Variable *Var) const = 0;
287 virtual const llvm::SmallBitVector &getAliasesForRegister(SizeT) const = 0; 287 virtual const llvm::SmallBitVector &getAliasesForRegister(RegNumT) const = 0;
288 288
289 void regAlloc(RegAllocKind Kind); 289 void regAlloc(RegAllocKind Kind);
290 290
291 virtual void 291 virtual void
292 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation, 292 makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
293 const llvm::SmallBitVector &ExcludeRegisters, 293 const llvm::SmallBitVector &ExcludeRegisters,
294 uint64_t Salt) const = 0; 294 uint64_t Salt) const = 0;
295 295
296 /// Get the minimum number of clusters required for a jump table to be 296 /// Get the minimum number of clusters required for a jump table to be
297 /// considered. 297 /// considered.
298 virtual SizeT getMinJumpTableSize() const = 0; 298 virtual SizeT getMinJumpTableSize() const = 0;
299 virtual void emitJumpTable(const Cfg *Func, 299 virtual void emitJumpTable(const Cfg *Func,
300 const InstJumpTable *JumpTable) const = 0; 300 const InstJumpTable *JumpTable) const = 0;
301 301
302 virtual void emitVariable(const Variable *Var) const = 0; 302 virtual void emitVariable(const Variable *Var) const = 0;
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
356 TargetLowering *const Target; 356 TargetLowering *const Target;
357 const bool NeedSandboxing; 357 const bool NeedSandboxing;
358 }; 358 };
359 359
360 explicit TargetLowering(Cfg *Func); 360 explicit TargetLowering(Cfg *Func);
361 // Applies command line filters to TypeToRegisterSet array. 361 // Applies command line filters to TypeToRegisterSet array.
362 static void 362 static void
363 filterTypeToRegisterSet(GlobalContext *Ctx, int32_t NumRegs, 363 filterTypeToRegisterSet(GlobalContext *Ctx, int32_t NumRegs,
364 llvm::SmallBitVector TypeToRegisterSet[], 364 llvm::SmallBitVector TypeToRegisterSet[],
365 size_t TypeToRegisterSetSize, 365 size_t TypeToRegisterSetSize,
366 std::function<IceString(int32_t)> getRegName, 366 std::function<IceString(RegNumT)> getRegName,
367 std::function<IceString(RegClass)> getRegClassName); 367 std::function<IceString(RegClass)> getRegClassName);
368 virtual void lowerAlloca(const InstAlloca *Instr) = 0; 368 virtual void lowerAlloca(const InstAlloca *Instr) = 0;
369 virtual void lowerArithmetic(const InstArithmetic *Instr) = 0; 369 virtual void lowerArithmetic(const InstArithmetic *Instr) = 0;
370 virtual void lowerAssign(const InstAssign *Instr) = 0; 370 virtual void lowerAssign(const InstAssign *Instr) = 0;
371 virtual void lowerBr(const InstBr *Instr) = 0; 371 virtual void lowerBr(const InstBr *Instr) = 0;
372 virtual void lowerCall(const InstCall *Instr) = 0; 372 virtual void lowerCall(const InstCall *Instr) = 0;
373 virtual void lowerCast(const InstCast *Instr) = 0; 373 virtual void lowerCast(const InstCast *Instr) = 0;
374 virtual void lowerFcmp(const InstFcmp *Instr) = 0; 374 virtual void lowerFcmp(const InstFcmp *Instr) = 0;
375 virtual void lowerExtractElement(const InstExtractElement *Instr) = 0; 375 virtual void lowerExtractElement(const InstExtractElement *Instr) = 0;
376 virtual void lowerIcmp(const InstIcmp *Instr) = 0; 376 virtual void lowerIcmp(const InstIcmp *Instr) = 0;
(...skipping 194 matching lines...) Expand 10 before | Expand all | Expand 10 after
571 virtual void lower() {} 571 virtual void lower() {}
572 572
573 protected: 573 protected:
574 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {} 574 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {}
575 GlobalContext *Ctx; 575 GlobalContext *Ctx;
576 }; 576 };
577 577
578 } // end of namespace Ice 578 } // end of namespace Ice
579 579
580 #endif // SUBZERO_SRC_ICETARGETLOWERING_H 580 #endif // SUBZERO_SRC_ICETARGETLOWERING_H
OLDNEW
« no previous file with comments | « src/IceRegistersX8632.h ('k') | src/IceTargetLowering.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698