Subzero: Use a proper RegNumT type instead of int32_t/SizeT.

src/IceRegistersARM32.h

 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 84 matching lines @@
   unsigned IsI64Pair : 1;
   unsigned IsFP32 : 1;
   unsigned IsFP64 : 1;
   unsigned IsVec128 : 1;
 #define NUM_ALIASES_BITS 3
   SizeT NumAliases : (NUM_ALIASES_BITS + 1);
   uint16_t Aliases[1 << NUM_ALIASES_BITS];
 #undef NUM_ALIASES_BITS
 } RegTable[Reg_NUM];
 
-static inline bool isGPRegister(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline void assertValidRegNum(RegNumT RegNum) {
+  (void)RegNum;
+  assert(RegNum != RegNumT::NoRegister);
+}
+
+static inline bool isGPRegister(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsGPR;
 }
 
 static constexpr inline SizeT getNumGPRegs() {
   return 0
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   +(isGPR)
       REGARM32_TABLE
 #undef X
       ;
 }
 
-static inline GPRRegister getEncodedGPR(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline GPRRegister getEncodedGPR(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return GPRRegister(RegTable[RegNum].Encoding);
 }
 
 static constexpr inline SizeT getNumGPRs() {
   return 0
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   +(isGPR)
       REGARM32_TABLE
 #undef X
       ;
 }
 
-static inline bool isGPR(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline bool isGPR(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsGPR;
 }
 
-static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline GPRRegister getI64PairFirstGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return GPRRegister(RegTable[RegNum].Encoding);
 }
 
-static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline GPRRegister getI64PairSecondGPRNum(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return GPRRegister(RegTable[RegNum].Encoding + 1);
 }
 
-static inline bool isI64RegisterPair(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline bool isI64RegisterPair(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsI64Pair;
 }
 
-static inline bool isEncodedSReg(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline bool isEncodedSReg(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsFP32;
 }
 
 static constexpr inline SizeT getNumSRegs() {
   return 0
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   +(isFP32)
       REGARM32_TABLE
 #undef X
       ;
 }
 
-static inline SRegister getEncodedSReg(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline SRegister getEncodedSReg(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return SRegister(RegTable[RegNum].Encoding);
 }
 
-static inline bool isEncodedDReg(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline bool isEncodedDReg(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsFP64;
 }
 
 static constexpr inline SizeT getNumDRegs() {
   return 0
 #define X(val, encode, name, cc_arg, scratch, preserved, stackptr, frameptr,   \
           isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)       \
   +(isFP64)
       REGARM32_TABLE
 #undef X
       ;
 }
 
-static inline DRegister getEncodedDReg(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline DRegister getEncodedDReg(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return DRegister(RegTable[RegNum].Encoding);
 }
 
-static inline bool isEncodedQReg(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline bool isEncodedQReg(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].IsVec128;
 }
 
-static inline QRegister getEncodedQReg(int32_t RegNum) {
+static inline QRegister getEncodedQReg(RegNumT RegNum) {
   assert(isEncodedQReg(RegNum));
   return QRegister(RegTable[RegNum].Encoding);
 }
 
-static inline IceString getRegName(int32_t RegNum) {
-  assert(RegNum >= 0);
-  assert(RegNum < Reg_NUM);
+static inline IceString getRegName(RegNumT RegNum) {
+  RegNum.assertIsValid();
   return RegTable[RegNum].Name;
 }
 
 // Extend enum RegClass with ARM32-specific register classes.
 enum RegClassARM32 : uint8_t {
   RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S
                             // registers.
   RCARM32_NUM
 };
 
 } // end of namespace RegARM32
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H