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1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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1238 // Given the above assertion, if type of operand is not legal | 1238 // Given the above assertion, if type of operand is not legal |
1239 // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy | 1239 // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy |
1240 // to a register. | 1240 // to a register. |
1241 if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) { | 1241 if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) { |
1242 (void)C; | 1242 (void)C; |
1243 // TODO(reed kotler): complete this case for proper implementation | 1243 // TODO(reed kotler): complete this case for proper implementation |
1244 Variable *Reg = makeReg(Ty, RegNum); | 1244 Variable *Reg = makeReg(Ty, RegNum); |
1245 Context.insert<InstFakeDef>(Reg); | 1245 Context.insert<InstFakeDef>(Reg); |
1246 return Reg; | 1246 return Reg; |
1247 } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) { | 1247 } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) { |
1248 uint32_t Value = static_cast<uint32_t>(C32->getValue()); | 1248 auto Value = static_cast<uint32_t>(C32->getValue()); |
John
2016/02/07 16:18:33
uint32_t Value = ...;
While at this, const?
Jim Stichnoth
2016/02/07 17:44:41
Done.
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1249 // Check if the immediate will fit in a Flexible second operand, | 1249 // Check if the immediate will fit in a Flexible second operand, |
1250 // if a Flexible second operand is allowed. We need to know the exact | 1250 // if a Flexible second operand is allowed. We need to know the exact |
1251 // value, so that rules out relocatable constants. | 1251 // value, so that rules out relocatable constants. |
1252 // Also try the inverse and use MVN if possible. | 1252 // Also try the inverse and use MVN if possible. |
1253 // Do a movw/movt to a register. | 1253 // Do a movw/movt to a register. |
1254 Variable *Reg; | 1254 Variable *Reg; |
1255 if (RegNum == Variable::NoRegister) | 1255 if (RegNum == Variable::NoRegister) |
1256 Reg = makeReg(Ty, RegNum); | 1256 Reg = makeReg(Ty, RegNum); |
1257 else | 1257 else |
1258 Reg = getPhysicalRegister(RegNum); | 1258 Reg = getPhysicalRegister(RegNum); |
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1299 Str << "\t.set\t" | 1299 Str << "\t.set\t" |
1300 << "nomips16\n"; | 1300 << "nomips16\n"; |
1301 } | 1301 } |
1302 | 1302 |
1303 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 1303 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
1304 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 1304 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
1305 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 1305 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
1306 | 1306 |
1307 } // end of namespace MIPS32 | 1307 } // end of namespace MIPS32 |
1308 } // end of namespace Ice | 1308 } // end of namespace Ice |
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