Add NOP to ARM IR lowering.

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 400 matching lines @@
     auto *Instr = Context.insert<InstARM32Mov>(Dest, Src0, Pred);
     Instr->setDestRedefined();
     if (Instr->isMultiDest()) {
       // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
       // fake-def for Instr.DestHi here.
       assert(llvm::isa<Variable64On32>(Dest));
       Context.insert<InstFakeDef>(Instr->getDestHi());
     }
   }
 
+  void _nop() { Context.insert<InstARM32Nop>(); }
+
   // Generates a vmov instruction to extract the given index from a vector
   // register.
   void _extractelement(Variable *Dest, Variable *Src0, uint32_t Index,
                        CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert<InstARM32Extract>(Dest, Src0, Index, Pred);
   }
 
   // Generates a vmov instruction to insert a value into the given index of a
   // vector register.
   void _insertelement(Variable *Dest, Variable *Src0, uint32_t Index,
@@ skipping 805 matching lines @@
 private:
   ~TargetHeaderARM32() = default;
 
   TargetARM32Features CPUFeatures;
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H