Add NOP to ARM IR lowering.

tests_lit/llvm2ice_tests/nop-insertion.ll

 ; This is a smoke test of nop insertion.
 
 ; REQUIRES: allow_dump
 
 ; Use filetype=asm because this currently depends on the /* variant */
 ; assembler comment.
 
 ; RUN: %p2i -i %s --filetype=asm -a -sz-seed=1 -nop-insertion \
 ; RUN:    -nop-insertion-percentage=50 -max-nops-per-instruction=1 \
 ; RUN:    | FileCheck %s --check-prefix=PROB50
 ; RUN: %p2i -i %s --filetype=asm -a -sz-seed=1 -nop-insertion \
 ; RUN:    -nop-insertion-percentage=90 -max-nops-per-instruction=1 \
 ; RUN:    | FileCheck %s --check-prefix=PROB90
 ; RUN: %p2i -i %s --filetype=asm -a -sz-seed=1 -nop-insertion \
 ; RUN:    -nop-insertion-percentage=50 -max-nops-per-instruction=2 \
 ; RUN:    | FileCheck %s --check-prefix=MAXNOPS2
 ; RUN: %p2i -i %s --filetype=asm --sandbox -a -sz-seed=1 -nop-insertion \
 ; RUN:    -nop-insertion-percentage=50 -max-nops-per-instruction=1 \
 ; RUN:    | FileCheck %s --check-prefix=SANDBOX50
+; RUN: %p2i -i %s --filetype=asm --sandbox --target=arm32 -a -sz-seed=1 \
+; RUN:    -nop-insertion -nop-insertion-percentage=110 \
+; RUN:    -max-nops-per-instruction=2 \
+; RUN:    | FileCheck %s --check-prefix=ARM110P2
 
 
 define internal <4 x i32> @mul_v4i32(<4 x i32> %a, <4 x i32> %b) {
 entry:
   %res = mul <4 x i32> %a, %b
   ret <4 x i32> %res
 
 ; PROB50-LABEL: mul_v4i32
 ; PROB50: nop /* variant = 1 */
 ; PROB50: subl $60, %esp
@@ skipping 100 matching lines @@
 ; SANDBOX50: nop /* variant = 1 */
 ; SANDBOX50: movups %xmm0, (%esp)
 ; SANDBOX50: movups (%esp), %xmm0
 ; SANDBOX50: addl $60, %esp
 ; SANDBOX50: pop %ecx
 ; SANDBOX50: .bundle_lock
 ; SANDBOX50: andl $-32, %ecx
 ; SANDBOX50: jmp *%ecx
 ; SANDBOX50: .bundle_unlock
 
+; ARM110P2:       mul_v4i32:
+; ARM110P2-NEXT: .Lmul_v4i32$entry:
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        sub     sp, sp, #48
+; ARM110P2-NEXT:        bic     sp, sp, #3221225472
+; ARM110P2-NEXT:        .bundle_unlock

[Eric Holk, 2016/02/08 17:29:43]

Out of curiosity, what are these .bundle_unlock and .bundle_lock things for?

[Karl, 2016/02/08 17:55:55]

These directives are the way we make sure that sandboxing for NaCl works. In
NaCl, instructions are in 16 byte bundles, Branches can only be to the beginning
of such bundles. A bundle_lock/bundle_unlock forces the assembler to put all
instructions between the two in a bundle.

[Eric Holk, 2016/02/08 17:58:15]

Thanks!

+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        add     ip, sp, #32
+; ARM110P2-NEXT:        bic     ip, ip, #3221225472
+; ARM110P2-NEXT:        vst1.32 q0, [ip]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        # [sp, #32] = def.pseudo 

[Jim Stichnoth, 2016/02/08 18:17:50]

All these def.pseudo lines seem to have a trailing space character.

(I guess FakeDef's emit routine ought to be fixed...)

[Karl, 2016/02/09 21:10:02]

Removed spaces. Fixing the dump() method for FakeDef is harder. It calls
emitSources() which doesn't add a space. Will look into fixing this in another
CL.

+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        add     ip, sp, #16
+; ARM110P2-NEXT:        bic     ip, ip, #3221225472
+; ARM110P2-NEXT:        vst1.32 q1, [ip]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        # [sp, #16] = def.pseudo 
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        add     ip, sp, #32
+; ARM110P2-NEXT:        bic     ip, ip, #3221225472
+; ARM110P2-NEXT:        vld1.32 q0, [ip]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        add     ip, sp, #16
+; ARM110P2-NEXT:        bic     ip, ip, #3221225472
+; ARM110P2-NEXT:        vld1.32 q1, [ip]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        vmul.i32        q0, q0, q1
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        vst1.32 q0, [sp]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        # [sp] = def.pseudo 
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        vld1.32 q0, [sp]
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        add     sp, sp, #48
+; ARM110P2-NEXT:        bic     sp, sp, #3221225472
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        .bundle_lock
+; ARM110P2-NEXT:        bic     lr, lr, #3221225487
+; ARM110P2-NEXT:        bx      lr
+; ARM110P2-NEXT:        .bundle_unlock
+; ARM110P2-NEXT:        nop
+; ARM110P2-NEXT:        nop
+
 }