Add NOP to ARM IR lowering.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 376 matching lines @@
     Clz,
     Cmn,
     Cmp,
     Dmb,
     Eor,
     Label,
     Ldr,
     Ldrex,
     Lsl,
     Lsr,
+    Nop,
     Mla,
     Mls,
     Mov,
     Movt,
     Movw,
     Mul,
     Mvn,
     Orr,
     Pop,
     Push,
@@ skipping 1020 matching lines @@
   }
   void emit(const Cfg *Func) const override;
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Instr) { return isClassof(Instr, Dmb); }
 
 private:
   explicit InstARM32Dmb(Cfg *Func);
 };
 
+class InstARM32Nop final : public InstARM32Pred {

[Eric Holk, 2016/02/08 17:29:43]

Does it make sense to have Nop derive from a predicable instruction?

[Karl, 2016/02/08 17:55:55]

The ARM instruction allows predicates, and so like other instructions, I made it
a subclass of this.

[Eric Holk, 2016/02/08 17:58:15]

That seems reasonable.

+  InstARM32Nop() = delete;
+  InstARM32Nop(const InstARM32Nop &) = delete;
+  InstARM32Nop &operator=(const InstARM32Nop &) = delete;
+
+public:
+  static InstARM32Nop *create(Cfg *Func) {
+    return new (Func->allocate<InstARM32Nop>()) InstARM32Nop(Func);
+  }
+  void emit(const Cfg *Func) const override;
+  void emitIAS(const Cfg *Func) const override;
+  void dump(const Cfg *Func) const override;
+  static bool classof(const Inst *Instr) { return isClassof(Instr, Nop); }
+
+private:
+  explicit InstARM32Nop(Cfg *Func);
+};
+
 // Declare partial template specializations of emit() methods that already have
 // default implementations. Without this, there is the possibility of ODR
 // violations and link errors.
 
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H