Chromium Code Reviews| Index: src/IceInstARM32.h |
| diff --git a/src/IceInstARM32.h b/src/IceInstARM32.h |
| index 9d39ec2dc198aca6389d2849dc1c559ad20d1593..50055a3009c9027f3f21d22dfb808b7911bbe551 100644 |
| --- a/src/IceInstARM32.h |
| +++ b/src/IceInstARM32.h |
| @@ -1102,6 +1102,13 @@ protected: |
| IValueT Registers) const = 0; |
| virtual void emitSRegs(const Cfg *Func, const EmitForm Form, |
| const Variable *BaseReg, SizeT RegCount) const = 0; |
| + // The following are for accessing S registers, which must be popped in |
| + // the reverse order they are pushed. |
| + virtual bool isAssignedConsecutiveRegisters(const Variable *Before, |
| + const Variable *After) const = 0; |
| + virtual Variable *getStackSReg(SizeT Index, SizeT Size) const = 0; |
| + virtual const Variable *updateBaseReg(const Variable *BaseReg, |
| + const Variable *NextReg) const = 0; |
| }; |
| /// Pops a list of registers. It may be a list of GPRs, or a list of VFP "s" |
| @@ -1129,7 +1136,11 @@ private: |
| IValueT Registers) const final; |
| void emitSRegs(const Cfg *Func, const EmitForm Form, const Variable *BaseReg, |
| SizeT RegCount) const final; |
| - |
| + bool isAssignedConsecutiveRegisters(const Variable *Before, |
| + const Variable *After) const final; |
| + Variable *getStackSReg(SizeT Index, SizeT Size) const final; |
| + const Variable *updateBaseReg(const Variable *BaseReg, |
| + const Variable *NextReg) const final; |
| VarList Dests; |
|
John
2016/02/05 01:46:25
For future reference: you could have marked the cl
Karl
2016/02/05 17:00:05
Acknowledged.
|
| }; |
| @@ -1158,6 +1169,11 @@ private: |
| IValueT Registers) const final; |
| void emitSRegs(const Cfg *Func, const EmitForm Form, const Variable *BaseReg, |
| SizeT RegCount) const final; |
| + bool isAssignedConsecutiveRegisters(const Variable *Before, |
| + const Variable *After) const final; |
| + Variable *getStackSReg(SizeT Index, SizeT Size) const final; |
| + const Variable *updateBaseReg(const Variable *BaseReg, |
| + const Variable *NextReg) const final; |
| }; |
| /// Ret pseudo-instruction. This is actually a "bx" instruction with an "lr" |