Subzero. Uses fixups to calculate addend to relocations.

unittest/AssemblerX8664/GPRArith.cpp

 //===- subzero/unittest/AssemblerX8664/GPRArith.cpp -----------------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 #include "AssemblerX8664/TestUtil.h"
 
@@ skipping 204 matching lines @@
        {0x00, 0x06, -0x06, 0x0600, -0x6000, 0x6000000, -0x6000000}) {
     TestLeaBaseDisp(r0, 0x22080Fu, Disp, r1);
     TestLeaBaseDisp(r1, 0x10000Fu, Disp, r2);
     TestLeaBaseDisp(r2, 0x20000Fu, Disp, r3);
     TestLeaBaseDisp(r3, 0x30000Fu, Disp, r4);
     TestLeaBaseDisp(r4, 0x40000Fu, Disp, r5);
     TestLeaBaseDisp(r5, 0x50000Fu, Disp, r6);
     TestLeaBaseDisp(r6, 0x60000Fu, Disp, r7);
     TestLeaBaseDisp(r7, 0x11000Fu, Disp, r8);
     TestLeaBaseDisp(r8, 0x11200Fu, Disp, r10);
-    TestLeaBaseDisp(r9, 0x000000u, Disp, r10);
+    TestLeaBaseDisp(r9, 0x220400u, Disp, r10);
     TestLeaBaseDisp(r10, 0x22000Fu, Disp, r11);
     TestLeaBaseDisp(r11, 0x22030Fu, Disp, r12);
     TestLeaBaseDisp(r12, 0x22040Fu, Disp, r13);
     TestLeaBaseDisp(r13, 0x22050Fu, Disp, r14);
     TestLeaBaseDisp(r14, 0x22060Fu, Disp, r15);
     TestLeaBaseDisp(r15, 0x22070Fu, Disp, r1);
   }
 
   // esp is not a valid index register.
   // ebp is not valid in this addressing mode (rm = 0).
   for (const int32_t Disp :
        {0x00, 0x06, -0x06, 0x0600, -0x6000, 0x6000000, -0x6000000}) {
     TestLeaIndex32bitDisp(r1, 0x2000u, Disp, r2, r3, r4, r6);
     TestLeaIndex32bitDisp(r2, 0x4010u, Disp, r3, r4, r6, r7);
     TestLeaIndex32bitDisp(r3, 0x6020u, Disp, r4, r6, r7, r5);
     TestLeaIndex32bitDisp(r4, 0x8030u, Disp, r6, r7, r5, r10);
     TestLeaIndex32bitDisp(r6, 0xA040u, Disp, r7, r5, r10, r1);
     TestLeaIndex32bitDisp(r7, 0xC050u, Disp, r5, r10, r1, r11);
     TestLeaIndex32bitDisp(r8, 0xC060u, Disp, r10, r1, r11, r12);
-    TestLeaIndex32bitDisp(r9, 0x0000u, Disp, r1, r11, r12, r13);
+    TestLeaIndex32bitDisp(r9, 0xC100u, Disp, r1, r11, r12, r13);
     TestLeaIndex32bitDisp(r10, 0xC008u, Disp, r11, r12, r13, r14);
     TestLeaIndex32bitDisp(r11, 0xC009u, Disp, r12, r13, r14, r15);
     TestLeaIndex32bitDisp(r12, 0xC00Au, Disp, r13, r14, r15, r1);
     TestLeaIndex32bitDisp(r13, 0xC00Bu, Disp, r14, r15, r1, r2);
     TestLeaIndex32bitDisp(r14, 0xC00Cu, Disp, r15, r1, r2, r3);
     TestLeaIndex32bitDisp(r15, 0xC00Du, Disp, r1, r2, r3, r4);
   }
 
   for (const int32_t Disp :
        {0x00, 0x06, -0x06, 0x0600, -0x6000, 0x6000000, -0x6000000}) {
     TestLeaBaseIndexDisp(r1, 0x100000u, r2, 0x600u, Disp, r3, r4, r6, r7);
     TestLeaBaseIndexDisp(r2, 0x200000u, r3, 0x500u, Disp, r4, r6, r7, r8);
     TestLeaBaseIndexDisp(r3, 0x300000u, r4, 0x400u, Disp, r6, r7, r8, r5);
     TestLeaBaseIndexDisp(r4, 0x400000u, r6, 0x300u, Disp, r7, r8, r5, r10);
     TestLeaBaseIndexDisp(r6, 0x500000u, r7, 0x200u, Disp, r8, r5, r10, r11);
     TestLeaBaseIndexDisp(r7, 0x600000u, r8, 0x100u, Disp, r5, r10, r11, r12);
     TestLeaBaseIndexDisp(r8, 0x600000u, r9, 0x1A0u, Disp, r10, r11, r12, r13);
-    TestLeaBaseIndexDisp(r9, 0x000000u, r10, 0x1B0u, Disp, r11, r12, r13, r14);
+    TestLeaBaseIndexDisp(r9, 0x600050u, r10, 0x1B0u, Disp, r11, r12, r13, r14);
     TestLeaBaseIndexDisp(r10, 0x602000u, r11, 0x1C0u, Disp, r12, r13, r14, r15);
     TestLeaBaseIndexDisp(r11, 0x603000u, r12, 0x1D0u, Disp, r13, r14, r15, r1);
     TestLeaBaseIndexDisp(r12, 0x604000u, r13, 0x1E0u, Disp, r14, r15, r1, r2);
     TestLeaBaseIndexDisp(r13, 0x605000u, r14, 0x1F0u, Disp, r15, r1, r2, r3);
     TestLeaBaseIndexDisp(r14, 0x606000u, r15, 0x10Au, Disp, r1, r2, r3, r4);
     TestLeaBaseIndexDisp(r15, 0x607000u, r1, 0x10Bu, Disp, r2, r3, r4, r6);
 
     TestLeaBaseIndexDisp(r0, 0, r2, 0x600u, Disp, r3, r4, r6, r7);
     TestLeaBaseIndexDisp(r0, 0, r3, 0x500u, Disp, r4, r6, r7, r8);
     TestLeaBaseIndexDisp(r0, 0, r4, 0x400u, Disp, r6, r7, r8, r5);
     TestLeaBaseIndexDisp(r0, 0, r6, 0x300u, Disp, r7, r8, r5, r10);
     TestLeaBaseIndexDisp(r0, 0, r7, 0x200u, Disp, r8, r5, r10, r11);
     TestLeaBaseIndexDisp(r0, 0, r8, 0x100u, Disp, r5, r10, r11, r12);
-    TestLeaBaseIndexDisp(r0, 0, r9, 0x000u, Disp, r10, r11, r12, r13);
+    TestLeaBaseIndexDisp(r0, 0, r9, 0x1000u, Disp, r10, r11, r12, r13);
     TestLeaBaseIndexDisp(r0, 0, r10, 0x1B0u, Disp, r11, r12, r13, r14);
     TestLeaBaseIndexDisp(r0, 0, r11, 0x1C0u, Disp, r12, r13, r14, r15);
     TestLeaBaseIndexDisp(r0, 0, r12, 0x1D0u, Disp, r13, r14, r15, r1);
     TestLeaBaseIndexDisp(r0, 0, r13, 0x1E0u, Disp, r14, r15, r1, r2);
     TestLeaBaseIndexDisp(r0, 0, r14, 0x1F0u, Disp, r15, r1, r2, r3);
     TestLeaBaseIndexDisp(r0, 0, r15, 0x10Au, Disp, r1, r2, r3, r4);
     TestLeaBaseIndexDisp(r0, 0, r1, 0x10Bu, Disp, r2, r3, r4, r6);
 
     TestLeaBaseIndexDisp(r5, 0x100000u, r2, 0x600u, Disp, r3, r4, r6, r7);
     TestLeaBaseIndexDisp(r5, 0x200000u, r3, 0x500u, Disp, r4, r6, r7, r8);
     TestLeaBaseIndexDisp(r5, 0x300000u, r4, 0x400u, Disp, r6, r7, r8, r1);
     TestLeaBaseIndexDisp(r5, 0x400000u, r6, 0x300u, Disp, r7, r8, r1, r10);
     TestLeaBaseIndexDisp(r5, 0x500000u, r7, 0x200u, Disp, r8, r1, r10, r11);
     TestLeaBaseIndexDisp(r5, 0x600000u, r8, 0x100u, Disp, r1, r10, r11, r12);
-    TestLeaBaseIndexDisp(r5, 0x600000u, r9, 0x000u, Disp, r10, r11, r12, r13);
+    TestLeaBaseIndexDisp(r5, 0x600000u, r9, 0x1A00u, Disp, r10, r11, r12, r13);
     TestLeaBaseIndexDisp(r5, 0x601000u, r10, 0x1B0u, Disp, r11, r12, r13, r14);
     TestLeaBaseIndexDisp(r5, 0x602000u, r11, 0x1C0u, Disp, r12, r13, r14, r15);
     TestLeaBaseIndexDisp(r5, 0x603000u, r12, 0x1D0u, Disp, r13, r14, r15, r1);
     TestLeaBaseIndexDisp(r5, 0x604000u, r13, 0x1E0u, Disp, r14, r15, r1, r2);
     TestLeaBaseIndexDisp(r5, 0x605000u, r14, 0x1F0u, Disp, r15, r1, r2, r3);
     TestLeaBaseIndexDisp(r5, 0x606000u, r15, 0x10Au, Disp, r1, r2, r3, r4);
     TestLeaBaseIndexDisp(r5, 0x607000u, r1, 0x10Bu, Disp, r2, r3, r4, r6);
 
     TestLeaBaseIndexDisp(r2, 0x100000u, r5, 0x600u, Disp, r3, r4, r6, r7);
     TestLeaBaseIndexDisp(r3, 0x200000u, r5, 0x500u, Disp, r4, r6, r7, r8);
     TestLeaBaseIndexDisp(r4, 0x300000u, r5, 0x400u, Disp, r6, r7, r8, r1);
     TestLeaBaseIndexDisp(r6, 0x400000u, r5, 0x300u, Disp, r7, r8, r1, r10);
     TestLeaBaseIndexDisp(r7, 0x500000u, r5, 0x200u, Disp, r8, r1, r10, r11);
     TestLeaBaseIndexDisp(r8, 0x600000u, r5, 0x100u, Disp, r1, r10, r11, r12);
-    TestLeaBaseIndexDisp(r9, 0x000000u, r5, 0x1A0u, Disp, r10, r11, r12, r13);
+    TestLeaBaseIndexDisp(r9, 0x660000u, r5, 0x1A0u, Disp, r10, r11, r12, r13);
     TestLeaBaseIndexDisp(r10, 0x601000u, r5, 0x1B0u, Disp, r11, r12, r13, r14);
     TestLeaBaseIndexDisp(r11, 0x602000u, r5, 0x1C0u, Disp, r12, r13, r14, r15);
     TestLeaBaseIndexDisp(r12, 0x603000u, r5, 0x1D0u, Disp, r13, r14, r15, r1);
     TestLeaBaseIndexDisp(r13, 0x604000u, r5, 0x1E0u, Disp, r14, r15, r1, r2);
     TestLeaBaseIndexDisp(r14, 0x605000u, r5, 0x1F0u, Disp, r15, r1, r2, r3);
     TestLeaBaseIndexDisp(r15, 0x606000u, r5, 0x10Au, Disp, r1, r2, r3, r4);
     TestLeaBaseIndexDisp(r1, 0x607000u, r5, 0x10Bu, Disp, r2, r3, r4, r6);
 
     TestLeaBaseIndexDisp(r0, 0, r5, 0xC0BEBEEF, Disp, r2, r3, r4, r6);
   }
@@ skipping 1586 matching lines @@
 #undef TestImplValue
 #undef TestImplSize
 #undef TestImplRegAddr
 #undef TestImplRegReg
 }
 
 } // end of anonymous namespace
 } // end of namespace Test
 } // end of namespace X8664
 } // end of namespace Ice