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| 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 37 static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) { | 37 static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) { |
| 38 return makeUnique<TargetMIPS32>(Func); | 38 return makeUnique<TargetMIPS32>(Func); |
| 39 } | 39 } |
| 40 | 40 |
| 41 std::unique_ptr<::Ice::Assembler> createAssembler() const override { | 41 std::unique_ptr<::Ice::Assembler> createAssembler() const override { |
| 42 return makeUnique<MIPS32::AssemblerMIPS32>(); | 42 return makeUnique<MIPS32::AssemblerMIPS32>(); |
| 43 } | 43 } |
| 44 | 44 |
| 45 void translateOm1() override; | 45 void translateOm1() override; |
| 46 void translateO2() override; | 46 void translateO2() override; |
| 47 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; | 47 bool doBranchOpt(Inst *Instr, const CfgNode *NextNode) override; |
| 48 | 48 |
| 49 SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; } | 49 SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; } |
| 50 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; | 50 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; |
| 51 IceString getRegName(SizeT RegNum, Type Ty) const override; | 51 IceString getRegName(SizeT RegNum, Type Ty) const override; |
| 52 llvm::SmallBitVector getRegisterSet(RegSetMask Include, | 52 llvm::SmallBitVector getRegisterSet(RegSetMask Include, |
| 53 RegSetMask Exclude) const override; | 53 RegSetMask Exclude) const override; |
| 54 const llvm::SmallBitVector & | 54 const llvm::SmallBitVector & |
| 55 getRegistersForVariable(const Variable *Var) const override { | 55 getRegistersForVariable(const Variable *Var) const override { |
| 56 RegClass RC = Var->getRegClass(); | 56 RegClass RC = Var->getRegClass(); |
| 57 assert(RC < RC_Target); | 57 assert(RC < RC_Target); |
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| 238 Operand *loOperand(Operand *Operand); | 238 Operand *loOperand(Operand *Operand); |
| 239 Operand *hiOperand(Operand *Operand); | 239 Operand *hiOperand(Operand *Operand); |
| 240 | 240 |
| 241 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); | 241 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); |
| 242 | 242 |
| 243 protected: | 243 protected: |
| 244 explicit TargetMIPS32(Cfg *Func); | 244 explicit TargetMIPS32(Cfg *Func); |
| 245 | 245 |
| 246 void postLower() override; | 246 void postLower() override; |
| 247 | 247 |
| 248 void lowerAlloca(const InstAlloca *Inst) override; | 248 void lowerAlloca(const InstAlloca *Instr) override; |
| 249 void lowerArithmetic(const InstArithmetic *Inst) override; | 249 void lowerArithmetic(const InstArithmetic *Instr) override; |
| 250 void lowerInt64Arithmetic(const InstArithmetic *Inst, Variable *Dest, | 250 void lowerInt64Arithmetic(const InstArithmetic *Instr, Variable *Dest, |
| 251 Operand *Src0, Operand *Src1); | 251 Operand *Src0, Operand *Src1); |
| 252 void lowerAssign(const InstAssign *Inst) override; | 252 void lowerAssign(const InstAssign *Instr) override; |
| 253 void lowerBr(const InstBr *Inst) override; | 253 void lowerBr(const InstBr *Instr) override; |
| 254 void lowerCall(const InstCall *Inst) override; | 254 void lowerCall(const InstCall *Instr) override; |
| 255 void lowerCast(const InstCast *Inst) override; | 255 void lowerCast(const InstCast *Instr) override; |
| 256 void lowerExtractElement(const InstExtractElement *Inst) override; | 256 void lowerExtractElement(const InstExtractElement *Instr) override; |
| 257 void lowerFcmp(const InstFcmp *Inst) override; | 257 void lowerFcmp(const InstFcmp *Instr) override; |
| 258 void lowerIcmp(const InstIcmp *Inst) override; | 258 void lowerIcmp(const InstIcmp *Instr) override; |
| 259 void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override; | 259 void lowerIntrinsicCall(const InstIntrinsicCall *Instr) override; |
| 260 void lowerInsertElement(const InstInsertElement *Inst) override; | 260 void lowerInsertElement(const InstInsertElement *Instr) override; |
| 261 void lowerLoad(const InstLoad *Inst) override; | 261 void lowerLoad(const InstLoad *Instr) override; |
| 262 void lowerPhi(const InstPhi *Inst) override; | 262 void lowerPhi(const InstPhi *Instr) override; |
| 263 void lowerRet(const InstRet *Inst) override; | 263 void lowerRet(const InstRet *Instr) override; |
| 264 void lowerSelect(const InstSelect *Inst) override; | 264 void lowerSelect(const InstSelect *Instr) override; |
| 265 void lowerStore(const InstStore *Inst) override; | 265 void lowerStore(const InstStore *Instr) override; |
| 266 void lowerSwitch(const InstSwitch *Inst) override; | 266 void lowerSwitch(const InstSwitch *Instr) override; |
| 267 void lowerUnreachable(const InstUnreachable *Inst) override; | 267 void lowerUnreachable(const InstUnreachable *Instr) override; |
| 268 void prelowerPhis() override; | 268 void prelowerPhis() override; |
| 269 uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override { | 269 uint32_t getCallStackArgumentsSizeBytes(const InstCall *Instr) override { |
| 270 (void)Instr; | 270 (void)Instr; |
| 271 return 0; | 271 return 0; |
| 272 } | 272 } |
| 273 void genTargetHelperCallFor(Inst *Instr) override { (void)Instr; } | 273 void genTargetHelperCallFor(Inst *Instr) override { (void)Instr; } |
| 274 void doAddressOptLoad() override; | 274 void doAddressOptLoad() override; |
| 275 void doAddressOptStore() override; | 275 void doAddressOptStore() override; |
| 276 void randomlyInsertNop(float Probability, | 276 void randomlyInsertNop(float Probability, |
| 277 RandomNumberGenerator &RNG) override; | 277 RandomNumberGenerator &RNG) override; |
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| 331 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 331 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
| 332 | 332 |
| 333 private: | 333 private: |
| 334 ~TargetHeaderMIPS32() = default; | 334 ~TargetHeaderMIPS32() = default; |
| 335 }; | 335 }; |
| 336 | 336 |
| 337 } // end of namespace MIPS32 | 337 } // end of namespace MIPS32 |
| 338 } // end of namespace Ice | 338 } // end of namespace Ice |
| 339 | 339 |
| 340 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 340 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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