Subzero: change Inst->Instr in many place to follow newer convention.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 253 matching lines @@
   if (Func->hasError())
     return;
   Func->dump("After stack frame mapping");
 
   // Nop insertion
   if (Ctx->getFlags().shouldDoNopInsertion()) {
     Func->doNopInsertion();
   }
 }
 
-bool TargetMIPS32::doBranchOpt(Inst *I, const CfgNode *NextNode) {
-  (void)I;
+bool TargetMIPS32::doBranchOpt(Inst *Instr, const CfgNode *NextNode) {
+  (void)Instr;
   (void)NextNode;
   UnimplementedError(Func->getContext()->getFlags());
   return false;
 }
 
 namespace {
 
 const char *RegNames[RegMIPS32::Reg_NUM] = {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isI64Pair, isFP32, isFP64, isVec128, alias_init)                     \
@@ skipping 267 matching lines @@
   if (frameptr && (Exclude & RegSet_FramePointer))                             \
     Registers[RegMIPS32::val] = false;
 
   REGMIPS32_TABLE
 
 #undef X
 
   return Registers;
 }
 
-void TargetMIPS32::lowerAlloca(const InstAlloca *Inst) {
+void TargetMIPS32::lowerAlloca(const InstAlloca *Instr) {
   UsesFramePointer = true;
   // Conservatively require the stack to be aligned. Some stack adjustment
   // operations implemented below assume that the stack is aligned before the
   // alloca. All the alloca code ensures that the stack alignment is preserved
   // after the alloca. The stack alignment restriction can be relaxed in some
   // cases.
   NeedsStackAlignment = true;
-  UnimplementedLoweringError(this, Inst);
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerInt64Arithmetic(const InstArithmetic *Inst,
+void TargetMIPS32::lowerInt64Arithmetic(const InstArithmetic *Instr,
                                         Variable *Dest, Operand *Src0,
                                         Operand *Src1) {
-  InstArithmetic::OpKind Op = Inst->getOp();
+  InstArithmetic::OpKind Op = Instr->getOp();
   switch (Op) {
   case InstArithmetic::Add:
   case InstArithmetic::And:
   case InstArithmetic::Or:
   case InstArithmetic::Sub:
   case InstArithmetic::Xor:
     break;
   default:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     return;
   }
   auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
   auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
   Variable *Src0LoR = legalizeToReg(loOperand(Src0));
   Variable *Src1LoR = legalizeToReg(loOperand(Src1));
   Variable *Src0HiR = legalizeToReg(hiOperand(Src0));
   Variable *Src1HiR = legalizeToReg(hiOperand(Src1));
 
   switch (Op) {
@@ skipping 47 matching lines @@
   case InstArithmetic::Xor: {
     Variable *T_Lo = makeReg(IceType_i32);
     Variable *T_Hi = makeReg(IceType_i32);
     _xor(T_Lo, Src0LoR, Src1LoR);
     _mov(DestLo, T_Lo);
     _xor(T_Hi, Src0HiR, Src1HiR);
     _mov(DestHi, T_Hi);
     return;
   }
   default:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     return;
   }
 }
 
-void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) {
-  Variable *Dest = Inst->getDest();
+void TargetMIPS32::lowerArithmetic(const InstArithmetic *Instr) {
+  Variable *Dest = Instr->getDest();
   // We need to signal all the UnimplementedLoweringError errors before any
   // legalization into new variables, otherwise Om1 register allocation may fail
   // when it sees variables that are defined but not used.
   Type DestTy = Dest->getType();
-  Operand *Src0 = legalizeUndef(Inst->getSrc(0));
-  Operand *Src1 = legalizeUndef(Inst->getSrc(1));
+  Operand *Src0 = legalizeUndef(Instr->getSrc(0));
+  Operand *Src1 = legalizeUndef(Instr->getSrc(1));
   if (DestTy == IceType_i64) {
-    lowerInt64Arithmetic(Inst, Inst->getDest(), Src0, Src1);
+    lowerInt64Arithmetic(Instr, Instr->getDest(), Src0, Src1);
     return;
   }
   if (isVectorType(Dest->getType())) {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     return;
   }
-  switch (Inst->getOp()) {
+  switch (Instr->getOp()) {
   default:
     break;
   case InstArithmetic::Shl:
   case InstArithmetic::Lshr:
   case InstArithmetic::Ashr:
   case InstArithmetic::Udiv:
   case InstArithmetic::Sdiv:
   case InstArithmetic::Urem:
   case InstArithmetic::Srem:
   case InstArithmetic::Fadd:
   case InstArithmetic::Fsub:
   case InstArithmetic::Fmul:
   case InstArithmetic::Fdiv:
   case InstArithmetic::Frem:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     return;
   }
 
   // At this point Dest->getType() is non-i64 scalar
 
   Variable *T = makeReg(Dest->getType());
   Variable *Src0R = legalizeToReg(Src0);
   Variable *Src1R = legalizeToReg(Src1);
 
-  switch (Inst->getOp()) {
+  switch (Instr->getOp()) {
   case InstArithmetic::_num:
     break;
   case InstArithmetic::Add:
     _addu(T, Src0R, Src1R);
     _mov(Dest, T);
     return;
   case InstArithmetic::And:
     _and(T, Src0R, Src1R);
     _mov(Dest, T);
     return;
@@ skipping 32 matching lines @@
     break;
   case InstArithmetic::Fsub:
     break;
   case InstArithmetic::Fmul:
     break;
   case InstArithmetic::Fdiv:
     break;
   case InstArithmetic::Frem:
     break;
   }
-  UnimplementedLoweringError(this, Inst);
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerAssign(const InstAssign *Inst) {
-  Variable *Dest = Inst->getDest();
-  Operand *Src0 = Inst->getSrc(0);
+void TargetMIPS32::lowerAssign(const InstAssign *Instr) {
+  Variable *Dest = Instr->getDest();
+  Operand *Src0 = Instr->getSrc(0);
   assert(Dest->getType() == Src0->getType());
   if (Dest->getType() == IceType_i64) {
     Src0 = legalizeUndef(Src0);
     Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
     Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
     auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
     auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     // Variable *T_Lo = nullptr, *T_Hi = nullptr;
     Variable *T_Lo = makeReg(IceType_i32);
     Variable *T_Hi = makeReg(IceType_i32);
     _mov(T_Lo, Src0Lo);
     _mov(DestLo, T_Lo);
     _mov(T_Hi, Src0Hi);
     _mov(DestHi, T_Hi);
   } else {
     Operand *SrcR;
     if (Dest->hasReg()) {
       // If Dest already has a physical register, then legalize the Src operand
       // into a Variable with the same register assignment.  This especially
       // helps allow the use of Flex operands.
       SrcR = legalize(Src0, Legal_Reg, Dest->getRegNum());
     } else {
       // Dest could be a stack operand. Since we could potentially need
       // to do a Store (and store can only have Register operands),
       // legalize this to a register.
       SrcR = legalize(Src0, Legal_Reg);
     }
     if (isVectorType(Dest->getType())) {
-      UnimplementedLoweringError(this, Inst);
+      UnimplementedLoweringError(this, Instr);
     } else {
       _mov(Dest, SrcR);
     }
   }
 }
 
-void TargetMIPS32::lowerBr(const InstBr *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerBr(const InstBr *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::lowerCall(const InstCall *Instr) {
   // TODO(rkotler): assign arguments to registers and stack. Also reserve stack.
   if (Instr->getNumArgs()) {
     UnimplementedLoweringError(this, Instr);
     return;
   }
   // Generate the call instruction.  Assign its result to a temporary with high
   // register allocation weight.
@@ skipping 69 matching lines @@
       if (isFloatingType(Dest->getType()) || isVectorType(Dest->getType())) {
         UnimplementedLoweringError(this, Instr);
         return;
       } else {
         _mov(Dest, ReturnReg);
       }
     }
   }
 }
 
-void TargetMIPS32::lowerCast(const InstCast *Inst) {
-  InstCast::OpKind CastKind = Inst->getCastKind();
+void TargetMIPS32::lowerCast(const InstCast *Instr) {
+  InstCast::OpKind CastKind = Instr->getCastKind();
   switch (CastKind) {
   default:
     Func->setError("Cast type not supported");
     return;
   case InstCast::Sext: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   case InstCast::Zext: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   case InstCast::Trunc: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   case InstCast::Fptrunc:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   case InstCast::Fpext: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   case InstCast::Fptosi:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   case InstCast::Fptoui:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   case InstCast::Sitofp:
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   case InstCast::Uitofp: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   case InstCast::Bitcast: {
-    UnimplementedLoweringError(this, Inst);
+    UnimplementedLoweringError(this, Instr);
     break;
   }
   }
 }
 
-void TargetMIPS32::lowerExtractElement(const InstExtractElement *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerExtractElement(const InstExtractElement *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerFcmp(const InstFcmp *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerFcmp(const InstFcmp *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerIcmp(const InstIcmp *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerIcmp(const InstIcmp *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerInsertElement(const InstInsertElement *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerInsertElement(const InstInsertElement *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
   switch (Instr->getIntrinsicInfo().ID) {
   case Intrinsics::AtomicCmpxchg: {
     UnimplementedLoweringError(this, Instr);
     return;
   }
   case Intrinsics::AtomicFence:
     UnimplementedLoweringError(this, Instr);
@@ skipping 108 matching lines @@
   case Intrinsics::Trap:
     UnimplementedLoweringError(this, Instr);
     return;
   case Intrinsics::UnknownIntrinsic:
     Func->setError("Should not be lowering UnknownIntrinsic");
     return;
   }
   return;
 }
 
-void TargetMIPS32::lowerLoad(const InstLoad *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerLoad(const InstLoad *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::doAddressOptLoad() {
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::randomlyInsertNop(float Probability,
                                      RandomNumberGenerator &RNG) {
   RandomNumberGeneratorWrapper RNGW(RNG);
   if (RNGW.getTrueWithProbability(Probability)) {
     UnimplementedError(Func->getContext()->getFlags());
   }
 }
 
-void TargetMIPS32::lowerPhi(const InstPhi * /*Inst*/) {
+void TargetMIPS32::lowerPhi(const InstPhi * /*Instr*/) {
   Func->setError("Phi found in regular instruction list");
 }
 
-void TargetMIPS32::lowerRet(const InstRet *Inst) {
+void TargetMIPS32::lowerRet(const InstRet *Instr) {
   Variable *Reg = nullptr;
-  if (Inst->hasRetValue()) {
-    Operand *Src0 = Inst->getRetValue();
+  if (Instr->hasRetValue()) {
+    Operand *Src0 = Instr->getRetValue();
     switch (Src0->getType()) {
     case IceType_i1:
     case IceType_i8:
     case IceType_i16:
     case IceType_i32: {
       // Reg = legalizeToReg(Src0, RegMIPS32::Reg_V0);
       Operand *Src0F = legalize(Src0, Legal_Reg);
       Reg = makeReg(Src0F->getType(), RegMIPS32::Reg_V0);
       _mov(Reg, Src0F);
       break;
     }
     case IceType_i64: {
       Src0 = legalizeUndef(Src0);
       Variable *R0 = legalizeToReg(loOperand(Src0), RegMIPS32::Reg_V0);
       Variable *R1 = legalizeToReg(hiOperand(Src0), RegMIPS32::Reg_V1);
       Reg = R0;
       Context.insert<InstFakeUse>(R1);
       break;
     }
 
     default:
-      UnimplementedLoweringError(this, Inst);
+      UnimplementedLoweringError(this, Instr);
     }
   }
   _ret(getPhysicalRegister(RegMIPS32::Reg_RA), Reg);
 }
 
-void TargetMIPS32::lowerSelect(const InstSelect *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerStore(const InstStore *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerStore(const InstStore *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::doAddressOptStore() {
   UnimplementedError(Func->getContext()->getFlags());
 }
 
-void TargetMIPS32::lowerSwitch(const InstSwitch *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerSwitch(const InstSwitch *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
-void TargetMIPS32::lowerUnreachable(const InstUnreachable *Inst) {
-  UnimplementedLoweringError(this, Inst);
+void TargetMIPS32::lowerUnreachable(const InstUnreachable *Instr) {
+  UnimplementedLoweringError(this, Instr);
 }
 
 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to preserve
 // integrity of liveness analysis. Undef values are also turned into zeroes,
 // since loOperand() and hiOperand() don't expect Undef input.
 void TargetMIPS32::prelowerPhis() {
   PhiLowering::prelowerPhis32Bit<TargetMIPS32>(this, Context.getNode(), Func);
 }
 
 void TargetMIPS32::postLower() {
@@ skipping 148 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice