Index: gcc/config/i386/i386.md |
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md |
index 75282f11a95cee6e8c3e8b20b9764b74b2c691d1..9089160fcfae043052c78019f850027268095405 100644 |
--- a/gcc/config/i386/i386.md |
+++ b/gcc/config/i386/i386.md |
@@ -687,7 +687,7 @@ |
(define_mode_attr r [(QI "q") (HI "r") (SI "r") (DI "r")]) |
;; Immediate operand constraint for integer modes. |
-(define_mode_attr i [(QI "n") (HI "n") (SI "i") (DI "e")]) |
+(define_mode_attr i [(QI "n") (HI "n") (SI "e") (DI "e")]) |
;; General operand predicate for integer modes. |
(define_mode_attr general_operand |
@@ -6674,7 +6674,7 @@ |
[(set (reg FLAGS_REG) |
(compare |
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "rem,ri")) |
+ (match_operand:SI 2 "x86_64_general_operand" "rem,re")) |
(const_int 0))) |
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") |
(plus:SI (match_dup 1) (match_dup 2)))] |
@@ -7757,7 +7757,7 @@ |
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") |
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0") |
(plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "") |
- (match_operand:SI 2 "x86_64_general_operand" "ri,rm")))) |
+ (match_operand:SI 2 "x86_64_general_operand" "re,rm")))) |
(clobber (reg:CC FLAGS_REG))] |
"ix86_binary_operator_ok (MINUS, SImode, operands)" |
"sbb{l}\t{%2, %0|%0, %2}" |
@@ -7810,7 +7810,7 @@ |
[(set (reg FLAGS_REG) |
(compare |
(minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "ri,rm")) |
+ (match_operand:SI 2 "x86_64_general_operand" "re,rm")) |
(const_int 0))) |
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") |
(minus:SI (match_dup 1) (match_dup 2)))] |
@@ -7839,7 +7839,7 @@ |
(define_insn "*subsi_3" |
[(set (reg FLAGS_REG) |
(compare (match_operand:SI 1 "nonimmediate_operand" "0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "ri,rm"))) |
+ (match_operand:SI 2 "x86_64_general_operand" "re,rm"))) |
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") |
(minus:SI (match_dup 1) (match_dup 2)))] |
"ix86_match_ccmode (insn, CCmode) |
@@ -8041,7 +8041,7 @@ |
(define_insn "*mulsi3_1" |
[(set (match_operand:SI 0 "register_operand" "=r,r,r") |
(mult:SI (match_operand:SI 1 "nonimmediate_operand" "%rm,rm,0") |
- (match_operand:SI 2 "x86_64_general_operand" "K,i,mr"))) |
+ (match_operand:SI 2 "x86_64_general_operand" "K,e,mr"))) |
(clobber (reg:CC FLAGS_REG))] |
"!(MEM_P (operands[1]) && MEM_P (operands[2]))" |
"@ |
@@ -8070,7 +8070,7 @@ |
[(set (match_operand:DI 0 "register_operand" "=r,r,r") |
(zero_extend:DI |
(mult:SI (match_operand:SI 1 "nonimmediate_operand" "%rm,rm,0") |
- (match_operand:SI 2 "x86_64_general_operand" "K,i,mr")))) |
+ (match_operand:SI 2 "x86_64_general_operand" "K,e,mr")))) |
(clobber (reg:CC FLAGS_REG))] |
"TARGET_64BIT |
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))" |
@@ -8925,7 +8925,7 @@ |
[(set (reg FLAGS_REG) |
(compare |
(and:SI (match_operand:SI 0 "nonimmediate_operand" "%!*a,r,rm") |
- (match_operand:SI 1 "x86_64_general_operand" "i,i,ri")) |
+ (match_operand:SI 1 "x86_64_general_operand" "e,e,re")) |
(const_int 0)))] |
"ix86_match_ccmode (insn, CCNOmode) |
&& !(MEM_P (operands[0]) && MEM_P (operands[1]))" |
@@ -9754,7 +9754,7 @@ |
(define_insn "*iorsi_1" |
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") |
(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "ri,g"))) |
+ (match_operand:SI 2 "x86_64_general_operand" "re,g"))) |
(clobber (reg:CC FLAGS_REG))] |
"ix86_binary_operator_ok (IOR, SImode, operands)" |
"or{l}\t{%2, %0|%0, %2}" |
@@ -9786,7 +9786,7 @@ |
(define_insn "*iorsi_2" |
[(set (reg FLAGS_REG) |
(compare (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "g,ri")) |
+ (match_operand:SI 2 "x86_64_general_operand" "g,re")) |
(const_int 0))) |
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") |
(ior:SI (match_dup 1) (match_dup 2)))] |
@@ -10425,7 +10425,7 @@ |
(define_insn "*xorsi_1" |
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r") |
(xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "ri,rm"))) |
+ (match_operand:SI 2 "x86_64_general_operand" "re,rm"))) |
(clobber (reg:CC FLAGS_REG))] |
"ix86_binary_operator_ok (XOR, SImode, operands)" |
"xor{l}\t{%2, %0|%0, %2}" |
@@ -10458,7 +10458,7 @@ |
(define_insn "*xorsi_2" |
[(set (reg FLAGS_REG) |
(compare (xor:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0") |
- (match_operand:SI 2 "x86_64_general_operand" "g,ri")) |
+ (match_operand:SI 2 "x86_64_general_operand" "g,re")) |
(const_int 0))) |
(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm") |
(xor:SI (match_dup 1) (match_dup 2)))] |