| OLD | NEW |
| 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// | 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 117 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 128 } | 128 } |
| 129 Asm->resetNeedsTextFixup(); | 129 Asm->resetNeedsTextFixup(); |
| 130 return; | 130 return; |
| 131 } | 131 } |
| 132 Asm->emitTextInst(StrBuf.str(), Asm->getEmitTextSize()); | 132 Asm->emitTextInst(StrBuf.str(), Asm->getEmitTextSize()); |
| 133 } | 133 } |
| 134 | 134 |
| 135 void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); } | 135 void InstARM32::emitIAS(const Cfg *Func) const { emitUsingTextFixup(Func); } |
| 136 | 136 |
| 137 void InstARM32Pred::emitUnaryopGPR(const char *Opcode, | 137 void InstARM32Pred::emitUnaryopGPR(const char *Opcode, |
| 138 const InstARM32Pred *Inst, const Cfg *Func, | 138 const InstARM32Pred *Instr, const Cfg *Func, |
| 139 bool NeedsWidthSuffix) { | 139 bool NeedsWidthSuffix) { |
| 140 Ostream &Str = Func->getContext()->getStrEmit(); | 140 Ostream &Str = Func->getContext()->getStrEmit(); |
| 141 assert(Inst->getSrcSize() == 1); | 141 assert(Instr->getSrcSize() == 1); |
| 142 Type SrcTy = Inst->getSrc(0)->getType(); | 142 Type SrcTy = Instr->getSrc(0)->getType(); |
| 143 Str << "\t" << Opcode; | 143 Str << "\t" << Opcode; |
| 144 if (NeedsWidthSuffix) | 144 if (NeedsWidthSuffix) |
| 145 Str << getWidthString(SrcTy); | 145 Str << getWidthString(SrcTy); |
| 146 Str << Inst->getPredicate() << "\t"; | 146 Str << Instr->getPredicate() << "\t"; |
| 147 Inst->getDest()->emit(Func); | 147 Instr->getDest()->emit(Func); |
| 148 Str << ", "; | 148 Str << ", "; |
| 149 Inst->getSrc(0)->emit(Func); | 149 Instr->getSrc(0)->emit(Func); |
| 150 } | 150 } |
| 151 | 151 |
| 152 void InstARM32Pred::emitUnaryopFP(const char *Opcode, const InstARM32Pred *Inst, | 152 void InstARM32Pred::emitUnaryopFP(const char *Opcode, |
| 153 const Cfg *Func) { | 153 const InstARM32Pred *Instr, const Cfg *Func) { |
| 154 Ostream &Str = Func->getContext()->getStrEmit(); | 154 Ostream &Str = Func->getContext()->getStrEmit(); |
| 155 assert(Inst->getSrcSize() == 1); | 155 assert(Instr->getSrcSize() == 1); |
| 156 Type SrcTy = Inst->getSrc(0)->getType(); | 156 Type SrcTy = Instr->getSrc(0)->getType(); |
| 157 Str << "\t" << Opcode << Inst->getPredicate() << getVecWidthString(SrcTy) | 157 Str << "\t" << Opcode << Instr->getPredicate() << getVecWidthString(SrcTy) |
| 158 << "\t"; | 158 << "\t"; |
| 159 Inst->getDest()->emit(Func); | 159 Instr->getDest()->emit(Func); |
| 160 Str << ", "; | 160 Str << ", "; |
| 161 Inst->getSrc(0)->emit(Func); | 161 Instr->getSrc(0)->emit(Func); |
| 162 } | 162 } |
| 163 | 163 |
| 164 void InstARM32Pred::emitTwoAddr(const char *Opcode, const InstARM32Pred *Inst, | 164 void InstARM32Pred::emitTwoAddr(const char *Opcode, const InstARM32Pred *Instr, |
| 165 const Cfg *Func) { | 165 const Cfg *Func) { |
| 166 if (!BuildDefs::dump()) | 166 if (!BuildDefs::dump()) |
| 167 return; | 167 return; |
| 168 Ostream &Str = Func->getContext()->getStrEmit(); | 168 Ostream &Str = Func->getContext()->getStrEmit(); |
| 169 assert(Inst->getSrcSize() == 2); | 169 assert(Instr->getSrcSize() == 2); |
| 170 Variable *Dest = Inst->getDest(); | 170 Variable *Dest = Instr->getDest(); |
| 171 assert(Dest == Inst->getSrc(0)); | 171 assert(Dest == Instr->getSrc(0)); |
| 172 Str << "\t" << Opcode << Inst->getPredicate() << "\t"; | 172 Str << "\t" << Opcode << Instr->getPredicate() << "\t"; |
| 173 Dest->emit(Func); | 173 Dest->emit(Func); |
| 174 Str << ", "; | 174 Str << ", "; |
| 175 Inst->getSrc(1)->emit(Func); | 175 Instr->getSrc(1)->emit(Func); |
| 176 } | 176 } |
| 177 | 177 |
| 178 void InstARM32Pred::emitThreeAddr(const char *Opcode, const InstARM32Pred *Inst, | 178 void InstARM32Pred::emitThreeAddr(const char *Opcode, |
| 179 const Cfg *Func, bool SetFlags) { | 179 const InstARM32Pred *Instr, const Cfg *Func, |
| 180 bool SetFlags) { |
| 180 if (!BuildDefs::dump()) | 181 if (!BuildDefs::dump()) |
| 181 return; | 182 return; |
| 182 Ostream &Str = Func->getContext()->getStrEmit(); | 183 Ostream &Str = Func->getContext()->getStrEmit(); |
| 183 assert(Inst->getSrcSize() == 2); | 184 assert(Instr->getSrcSize() == 2); |
| 184 Str << "\t" << Opcode << (SetFlags ? "s" : "") << Inst->getPredicate() | 185 Str << "\t" << Opcode << (SetFlags ? "s" : "") << Instr->getPredicate() |
| 185 << "\t"; | 186 << "\t"; |
| 186 Inst->getDest()->emit(Func); | 187 Instr->getDest()->emit(Func); |
| 187 Str << ", "; | 188 Str << ", "; |
| 188 Inst->getSrc(0)->emit(Func); | 189 Instr->getSrc(0)->emit(Func); |
| 189 Str << ", "; | 190 Str << ", "; |
| 190 Inst->getSrc(1)->emit(Func); | 191 Instr->getSrc(1)->emit(Func); |
| 191 } | 192 } |
| 192 | 193 |
| 193 void InstARM32::emitThreeAddrFP(const char *Opcode, const InstARM32 *Inst, | 194 void InstARM32::emitThreeAddrFP(const char *Opcode, const InstARM32 *Instr, |
| 194 const Cfg *Func) { | 195 const Cfg *Func) { |
| 195 if (!BuildDefs::dump()) | 196 if (!BuildDefs::dump()) |
| 196 return; | 197 return; |
| 197 Ostream &Str = Func->getContext()->getStrEmit(); | 198 Ostream &Str = Func->getContext()->getStrEmit(); |
| 198 assert(Inst->getSrcSize() == 2); | 199 assert(Instr->getSrcSize() == 2); |
| 199 Str << "\t" << Opcode << getVecWidthString(Inst->getDest()->getType()) | 200 Str << "\t" << Opcode << getVecWidthString(Instr->getDest()->getType()) |
| 200 << "\t"; | 201 << "\t"; |
| 201 Inst->getDest()->emit(Func); | 202 Instr->getDest()->emit(Func); |
| 202 Str << ", "; | 203 Str << ", "; |
| 203 Inst->getSrc(0)->emit(Func); | 204 Instr->getSrc(0)->emit(Func); |
| 204 Str << ", "; | 205 Str << ", "; |
| 205 Inst->getSrc(1)->emit(Func); | 206 Instr->getSrc(1)->emit(Func); |
| 206 } | 207 } |
| 207 | 208 |
| 208 void InstARM32::emitFourAddrFP(const char *Opcode, const InstARM32 *Inst, | 209 void InstARM32::emitFourAddrFP(const char *Opcode, const InstARM32 *Instr, |
| 209 const Cfg *Func) { | 210 const Cfg *Func) { |
| 210 if (!BuildDefs::dump()) | 211 if (!BuildDefs::dump()) |
| 211 return; | 212 return; |
| 212 Ostream &Str = Func->getContext()->getStrEmit(); | 213 Ostream &Str = Func->getContext()->getStrEmit(); |
| 213 assert(Inst->getSrcSize() == 3); | 214 assert(Instr->getSrcSize() == 3); |
| 214 assert(Inst->getSrc(0) == Inst->getDest()); | 215 assert(Instr->getSrc(0) == Instr->getDest()); |
| 215 Str << "\t" << Opcode << getVecWidthString(Inst->getDest()->getType()) | 216 Str << "\t" << Opcode << getVecWidthString(Instr->getDest()->getType()) |
| 216 << "\t"; | 217 << "\t"; |
| 217 Inst->getDest()->emit(Func); | 218 Instr->getDest()->emit(Func); |
| 218 Str << ", "; | 219 Str << ", "; |
| 219 Inst->getSrc(1)->emit(Func); | 220 Instr->getSrc(1)->emit(Func); |
| 220 Str << ", "; | 221 Str << ", "; |
| 221 Inst->getSrc(2)->emit(Func); | 222 Instr->getSrc(2)->emit(Func); |
| 222 } | 223 } |
| 223 | 224 |
| 224 void InstARM32Pred::emitFourAddr(const char *Opcode, const InstARM32Pred *Inst, | 225 void InstARM32Pred::emitFourAddr(const char *Opcode, const InstARM32Pred *Instr, |
| 225 const Cfg *Func) { | 226 const Cfg *Func) { |
| 226 if (!BuildDefs::dump()) | 227 if (!BuildDefs::dump()) |
| 227 return; | 228 return; |
| 228 Ostream &Str = Func->getContext()->getStrEmit(); | 229 Ostream &Str = Func->getContext()->getStrEmit(); |
| 229 assert(Inst->getSrcSize() == 3); | 230 assert(Instr->getSrcSize() == 3); |
| 230 Str << "\t" << Opcode << Inst->getPredicate() << "\t"; | 231 Str << "\t" << Opcode << Instr->getPredicate() << "\t"; |
| 231 Inst->getDest()->emit(Func); | 232 Instr->getDest()->emit(Func); |
| 232 Str << ", "; | 233 Str << ", "; |
| 233 Inst->getSrc(0)->emit(Func); | 234 Instr->getSrc(0)->emit(Func); |
| 234 Str << ", "; | 235 Str << ", "; |
| 235 Inst->getSrc(1)->emit(Func); | 236 Instr->getSrc(1)->emit(Func); |
| 236 Str << ", "; | 237 Str << ", "; |
| 237 Inst->getSrc(2)->emit(Func); | 238 Instr->getSrc(2)->emit(Func); |
| 238 } | 239 } |
| 239 | 240 |
| 240 template <InstARM32::InstKindARM32 K> | 241 template <InstARM32::InstKindARM32 K> |
| 241 void InstARM32FourAddrGPR<K>::emitIAS(const Cfg *Func) const { | 242 void InstARM32FourAddrGPR<K>::emitIAS(const Cfg *Func) const { |
| 242 emitUsingTextFixup(Func); | 243 emitUsingTextFixup(Func); |
| 243 } | 244 } |
| 244 | 245 |
| 245 template <InstARM32::InstKindARM32 K> | 246 template <InstARM32::InstKindARM32 K> |
| 246 void InstARM32FourAddrFP<K>::emitIAS(const Cfg *Func) const { | 247 void InstARM32FourAddrFP<K>::emitIAS(const Cfg *Func) const { |
| 247 emitUsingTextFixup(Func); | 248 emitUsingTextFixup(Func); |
| (...skipping 13 matching lines...) Expand all Loading... |
| 261 } | 262 } |
| 262 | 263 |
| 263 template <> void InstARM32Mls::emitIAS(const Cfg *Func) const { | 264 template <> void InstARM32Mls::emitIAS(const Cfg *Func) const { |
| 264 assert(getSrcSize() == 3); | 265 assert(getSrcSize() == 3); |
| 265 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); | 266 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); |
| 266 Asm->mls(getDest(), getSrc(0), getSrc(1), getSrc(2), getPredicate()); | 267 Asm->mls(getDest(), getSrc(0), getSrc(1), getSrc(2), getPredicate()); |
| 267 if (Asm->needsTextFixup()) | 268 if (Asm->needsTextFixup()) |
| 268 emitUsingTextFixup(Func); | 269 emitUsingTextFixup(Func); |
| 269 } | 270 } |
| 270 | 271 |
| 271 void InstARM32Pred::emitCmpLike(const char *Opcode, const InstARM32Pred *Inst, | 272 void InstARM32Pred::emitCmpLike(const char *Opcode, const InstARM32Pred *Instr, |
| 272 const Cfg *Func) { | 273 const Cfg *Func) { |
| 273 if (!BuildDefs::dump()) | 274 if (!BuildDefs::dump()) |
| 274 return; | 275 return; |
| 275 Ostream &Str = Func->getContext()->getStrEmit(); | 276 Ostream &Str = Func->getContext()->getStrEmit(); |
| 276 assert(Inst->getSrcSize() == 2); | 277 assert(Instr->getSrcSize() == 2); |
| 277 Str << "\t" << Opcode << Inst->getPredicate() << "\t"; | 278 Str << "\t" << Opcode << Instr->getPredicate() << "\t"; |
| 278 Inst->getSrc(0)->emit(Func); | 279 Instr->getSrc(0)->emit(Func); |
| 279 Str << ", "; | 280 Str << ", "; |
| 280 Inst->getSrc(1)->emit(Func); | 281 Instr->getSrc(1)->emit(Func); |
| 281 } | 282 } |
| 282 | 283 |
| 283 OperandARM32Mem::OperandARM32Mem(Cfg * /* Func */, Type Ty, Variable *Base, | 284 OperandARM32Mem::OperandARM32Mem(Cfg * /* Func */, Type Ty, Variable *Base, |
| 284 ConstantInteger32 *ImmOffset, AddrMode Mode) | 285 ConstantInteger32 *ImmOffset, AddrMode Mode) |
| 285 : OperandARM32(kMem, Ty), Base(Base), ImmOffset(ImmOffset), Index(nullptr), | 286 : OperandARM32(kMem, Ty), Base(Base), ImmOffset(ImmOffset), Index(nullptr), |
| 286 ShiftOp(kNoShift), ShiftAmt(0), Mode(Mode) { | 287 ShiftOp(kNoShift), ShiftAmt(0), Mode(Mode) { |
| 287 // The Neg modes are only needed for Reg +/- Reg. | 288 // The Neg modes are only needed for Reg +/- Reg. |
| 288 assert(!isNegAddrMode()); | 289 assert(!isNegAddrMode()); |
| 289 NumVars = 1; | 290 NumVars = 1; |
| 290 Vars = &this->Base; | 291 Vars = &this->Base; |
| (...skipping 2256 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 2547 | 2548 |
| 2548 template class InstARM32FourAddrGPR<InstARM32::Mla>; | 2549 template class InstARM32FourAddrGPR<InstARM32::Mla>; |
| 2549 template class InstARM32FourAddrGPR<InstARM32::Mls>; | 2550 template class InstARM32FourAddrGPR<InstARM32::Mls>; |
| 2550 | 2551 |
| 2551 template class InstARM32CmpLike<InstARM32::Cmn>; | 2552 template class InstARM32CmpLike<InstARM32::Cmn>; |
| 2552 template class InstARM32CmpLike<InstARM32::Cmp>; | 2553 template class InstARM32CmpLike<InstARM32::Cmp>; |
| 2553 template class InstARM32CmpLike<InstARM32::Tst>; | 2554 template class InstARM32CmpLike<InstARM32::Tst>; |
| 2554 | 2555 |
| 2555 } // end of namespace ARM32 | 2556 } // end of namespace ARM32 |
| 2556 } // end of namespace Ice | 2557 } // end of namespace Ice |
| OLD | NEW |