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1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// | 1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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32 // Returns the name the node was created with. If no name was given, it | 32 // Returns the name the node was created with. If no name was given, it |
33 // synthesizes a (hopefully) unique name. | 33 // synthesizes a (hopefully) unique name. |
34 IceString CfgNode::getName() const { | 34 IceString CfgNode::getName() const { |
35 if (NameIndex >= 0) | 35 if (NameIndex >= 0) |
36 return Func->getIdentifierName(NameIndex); | 36 return Func->getIdentifierName(NameIndex); |
37 return "__" + std::to_string(LabelNumber); | 37 return "__" + std::to_string(LabelNumber); |
38 } | 38 } |
39 | 39 |
40 // Adds an instruction to either the Phi list or the regular instruction list. | 40 // Adds an instruction to either the Phi list or the regular instruction list. |
41 // Validates that all Phis are added before all regular instructions. | 41 // Validates that all Phis are added before all regular instructions. |
42 void CfgNode::appendInst(Inst *Inst) { | 42 void CfgNode::appendInst(Inst *Instr) { |
43 ++InstCountEstimate; | 43 ++InstCountEstimate; |
44 if (auto *Phi = llvm::dyn_cast<InstPhi>(Inst)) { | 44 if (auto *Phi = llvm::dyn_cast<InstPhi>(Instr)) { |
45 if (!Insts.empty()) { | 45 if (!Insts.empty()) { |
46 Func->setError("Phi instruction added to the middle of a block"); | 46 Func->setError("Phi instruction added to the middle of a block"); |
47 return; | 47 return; |
48 } | 48 } |
49 Phis.push_back(Phi); | 49 Phis.push_back(Phi); |
50 } else { | 50 } else { |
51 Insts.push_back(Inst); | 51 Insts.push_back(Instr); |
52 } | 52 } |
53 } | 53 } |
54 | 54 |
55 // Renumbers the non-deleted instructions in the node. This needs to be done in | 55 // Renumbers the non-deleted instructions in the node. This needs to be done in |
56 // preparation for live range analysis. The instruction numbers in a block must | 56 // preparation for live range analysis. The instruction numbers in a block must |
57 // be monotonically increasing. The range of instruction numbers in a block, | 57 // be monotonically increasing. The range of instruction numbers in a block, |
58 // from lowest to highest, must not overlap with the range of any other block. | 58 // from lowest to highest, must not overlap with the range of any other block. |
59 void CfgNode::renumberInstructions() { | 59 void CfgNode::renumberInstructions() { |
60 InstNumberT FirstNumber = Func->getNextInstNumber(); | 60 InstNumberT FirstNumber = Func->getNextInstNumber(); |
61 for (Inst &I : Phis) | 61 for (Inst &I : Phis) |
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1422 Operand *RMWI64Name = Context->getConstantExternSym(RMW_I64); | 1422 Operand *RMWI64Name = Context->getConstantExternSym(RMW_I64); |
1423 constexpr RelocOffsetT Offset = 0; | 1423 constexpr RelocOffsetT Offset = 0; |
1424 constexpr bool SuppressMangling = true; | 1424 constexpr bool SuppressMangling = true; |
1425 Constant *Counter = | 1425 Constant *Counter = |
1426 Context->getConstantSym(Offset, Var->getName(), SuppressMangling); | 1426 Context->getConstantSym(Offset, Var->getName(), SuppressMangling); |
1427 Constant *AtomicRMWOp = Context->getConstantInt32(Intrinsics::AtomicAdd); | 1427 Constant *AtomicRMWOp = Context->getConstantInt32(Intrinsics::AtomicAdd); |
1428 Constant *One = Context->getConstantInt64(1); | 1428 Constant *One = Context->getConstantInt64(1); |
1429 Constant *OrderAcquireRelease = | 1429 Constant *OrderAcquireRelease = |
1430 Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease); | 1430 Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease); |
1431 | 1431 |
1432 auto *Inst = InstIntrinsicCall::create( | 1432 auto *Instr = InstIntrinsicCall::create( |
1433 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); | 1433 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); |
1434 Inst->addArg(AtomicRMWOp); | 1434 Instr->addArg(AtomicRMWOp); |
1435 Inst->addArg(Counter); | 1435 Instr->addArg(Counter); |
1436 Inst->addArg(One); | 1436 Instr->addArg(One); |
1437 Inst->addArg(OrderAcquireRelease); | 1437 Instr->addArg(OrderAcquireRelease); |
1438 Insts.push_front(Inst); | 1438 Insts.push_front(Instr); |
1439 } | 1439 } |
1440 | 1440 |
1441 } // end of namespace Ice | 1441 } // end of namespace Ice |
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