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1 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===// |
2 // | 2 // |
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
6 // | 6 // |
7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
8 // | 8 // |
9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
10 // | 10 // |
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602 | 602 |
603 namespace Ice { | 603 namespace Ice { |
604 namespace ARM32 { | 604 namespace ARM32 { |
605 | 605 |
606 size_t MoveRelocatableFixup::emit(GlobalContext *Ctx, | 606 size_t MoveRelocatableFixup::emit(GlobalContext *Ctx, |
607 const Assembler &Asm) const { | 607 const Assembler &Asm) const { |
608 if (!BuildDefs::dump()) | 608 if (!BuildDefs::dump()) |
609 return InstARM32::InstSize; | 609 return InstARM32::InstSize; |
610 Ostream &Str = Ctx->getStrEmit(); | 610 Ostream &Str = Ctx->getStrEmit(); |
611 IValueT Inst = Asm.load<IValueT>(position()); | 611 IValueT Inst = Asm.load<IValueT>(position()); |
| 612 const bool IsMovw = kind() == llvm::ELF::R_ARM_MOVW_ABS_NC || |
| 613 kind() == llvm::ELF::R_ARM_MOVW_PREL_NC; |
612 Str << "\t" | 614 Str << "\t" |
613 "mov" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "w" : "t") << "\t" | 615 "mov" << (IsMovw ? "w" : "t") << "\t" |
614 << RegARM32::getRegName(RegNumT::fixme((Inst >> kRdShift) & 0xF)) | 616 << RegARM32::getRegName(RegNumT::fixme((Inst >> kRdShift) & 0xF)) |
615 << ", #:" << (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? "lower" : "upper") | 617 << ", #:" << (IsMovw ? "lower" : "upper") << "16:" << symbol(Ctx, &Asm) |
616 << "16:" << symbol(Ctx, &Asm) << "\t@ .word " | 618 << "\t@ .word " << llvm::format_hex_no_prefix(Inst, 8) << "\n"; |
617 << llvm::format_hex_no_prefix(Inst, 8) << "\n"; | |
618 return InstARM32::InstSize; | 619 return InstARM32::InstSize; |
619 } | 620 } |
620 | 621 |
621 // This fixup points to an ARM32 instruction with the following format: | 622 // This fixup points to an ARM32 instruction with the following format: |
622 void MoveRelocatableFixup::emitOffset(Assembler *Asm) const { | 623 void MoveRelocatableFixup::emitOffset(Assembler *Asm) const { |
623 // cccc00110T00iiiiddddiiiiiiiiiiii where cccc=Cond, dddd=Rd, | 624 // cccc00110T00iiiiddddiiiiiiiiiiii where cccc=Cond, dddd=Rd, |
624 // iiiiiiiiiiiiiiii = Imm16, and T=1 for movt. | 625 // iiiiiiiiiiiiiiii = Imm16, and T=1 for movt. |
625 | 626 |
626 const IValueT Inst = Asm->load<IValueT>(position()); | 627 const IValueT Inst = Asm->load<IValueT>(position()); |
627 constexpr IValueT Imm16Mask = 0x000F0FFF; | 628 constexpr IValueT Imm16Mask = 0x000F0FFF; |
628 const IValueT Imm16 = | 629 const IValueT Imm16 = offset() & 0xffff; |
629 offset() >> (kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ? 0 : 16) & 0xffff; | |
630 Asm->store(position(), | 630 Asm->store(position(), |
631 (Inst & ~Imm16Mask) | ((Imm16 >> 12) << 16) | (Imm16 & 0xfff)); | 631 (Inst & ~Imm16Mask) | ((Imm16 >> 12) << 16) | (Imm16 & 0xfff)); |
632 } | 632 } |
633 | 633 |
634 MoveRelocatableFixup *AssemblerARM32::createMoveFixup(bool IsMovW, | 634 MoveRelocatableFixup *AssemblerARM32::createMoveFixup(bool IsMovW, |
635 const Constant *Value) { | 635 const Constant *Value) { |
636 MoveRelocatableFixup *F = | 636 MoveRelocatableFixup *F = |
637 new (allocate<MoveRelocatableFixup>()) MoveRelocatableFixup(); | 637 new (allocate<MoveRelocatableFixup>()) MoveRelocatableFixup(); |
638 F->set_kind(IsMovW ? llvm::ELF::R_ARM_MOVW_ABS_NC | 638 F->set_kind(IsMovW ? (IsNonsfi ? llvm::ELF::R_ARM_MOVW_PREL_NC |
639 : llvm::ELF::R_ARM_MOVT_ABS); | 639 : llvm::ELF::R_ARM_MOVW_ABS_NC) |
| 640 : (IsNonsfi ? llvm::ELF::R_ARM_MOVT_PREL |
| 641 : llvm::ELF::R_ARM_MOVT_ABS)); |
640 F->set_value(Value); | 642 F->set_value(Value); |
641 Buffer.installFixup(F); | 643 Buffer.installFixup(F); |
642 return F; | 644 return F; |
643 } | 645 } |
644 | 646 |
645 size_t BlRelocatableFixup::emit(GlobalContext *Ctx, | 647 size_t BlRelocatableFixup::emit(GlobalContext *Ctx, |
646 const Assembler &Asm) const { | 648 const Assembler &Asm) const { |
647 if (!BuildDefs::dump()) | 649 if (!BuildDefs::dump()) |
648 return InstARM32::InstSize; | 650 return InstARM32::InstSize; |
649 Ostream &Str = Ctx->getStrEmit(); | 651 Ostream &Str = Ctx->getStrEmit(); |
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3145 constexpr const char *Vsqrts = "vsqrts"; | 3147 constexpr const char *Vsqrts = "vsqrts"; |
3146 IValueT Sd = encodeSRegister(OpSd, "Sd", Vsqrts); | 3148 IValueT Sd = encodeSRegister(OpSd, "Sd", Vsqrts); |
3147 IValueT Sm = encodeSRegister(OpSm, "Sm", Vsqrts); | 3149 IValueT Sm = encodeSRegister(OpSm, "Sm", Vsqrts); |
3148 constexpr IValueT VsqrtsOpcode = B23 | B21 | B20 | B16 | B7 | B6; | 3150 constexpr IValueT VsqrtsOpcode = B23 | B21 | B20 | B16 | B7 | B6; |
3149 constexpr IValueT S0 = 0; | 3151 constexpr IValueT S0 = 0; |
3150 emitVFPsss(Cond, VsqrtsOpcode, Sd, S0, Sm); | 3152 emitVFPsss(Cond, VsqrtsOpcode, Sd, S0, Sm); |
3151 } | 3153 } |
3152 | 3154 |
3153 } // end of namespace ARM32 | 3155 } // end of namespace ARM32 |
3154 } // end of namespace Ice | 3156 } // end of namespace Ice |
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