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Side by Side Diff: tests_lit/llvm2ice_tests/nonsfi.ll

Issue 1665263003: Subzero. ARM32. Nonsfi. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments. Created 4 years, 10 months ago
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1 ; RUN: %p2i -i %s --filetype=obj --assemble --disassemble --args -O2 -nonsfi=1 \ 1 ; RUN: %p2i -i %s --target=x8632 --filetype=obj --assemble --disassemble \
2 ; RUN: --ffunction-sections \ 2 ; RUN: --args -O2 -nonsfi=1 --ffunction-sections \
3 ; RUN: | FileCheck --check-prefix=NONSFI %s 3 ; RUN: | FileCheck --check-prefix=NONSFI %s
4 ; RUN: %p2i -i %s --filetype=obj --assemble --disassemble --args -O2 -nonsfi=0 \ 4 ; RUN: %p2i -i %s --target=x8632 --filetype=obj --assemble --disassemble \
5 ; RUN: --ffunction-sections \ 5 ; RUN: --args -O2 -nonsfi=0 --ffunction-sections \
6 ; RUN: | FileCheck --check-prefix=DEFAULT %s 6 ; RUN: | FileCheck --check-prefix=DEFAULT %s
7 7
8 ; RUN: %p2i -i %s --target=arm32 --filetype=obj --assemble --disassemble \
9 ; RUN: --args -O2 -nonsfi=1 --ffunction-sections \
10 ; RUN: | FileCheck --check-prefix=ARM32-NONSFI %s
11
8 @G1 = internal global [4 x i8] zeroinitializer, align 4 12 @G1 = internal global [4 x i8] zeroinitializer, align 4
9 @G2 = internal global [4 x i8] zeroinitializer, align 4 13 @G2 = internal global [4 x i8] zeroinitializer, align 4
10 14
11 define internal void @testCallRegular() { 15 define internal void @testCallRegular() {
12 entry: 16 entry:
13 ; Make a call to a *different* function, plus use -ffunction-sections, to 17 ; Make a call to a *different* function, plus use -ffunction-sections, to
14 ; force an appropriately-named relocation. 18 ; force an appropriately-named relocation.
15 call i32 @testLoadBasic() 19 call i32 @testLoadBasic()
16 ret void 20 ret void
17 } 21 }
18 ; Expect a simple direct call to testCallRegular. 22 ; Expect a simple direct call to testCallRegular.
19 ; NONSFI-LABEL: testCallRegular 23 ; NONSFI-LABEL: testCallRegular
20 ; NONSFI: call {{.*}} R_386_PC32 {{.*}}testLoadBasic 24 ; NONSFI: call {{.*}} R_386_PC32 {{.*}}testLoadBasic
21 ; DEFAULT-LABEL: testCallRegular 25 ; DEFAULT-LABEL: testCallRegular
22 26
27 ; ARM32-NONSFI-LABEL: testCallRegular
28 ; ARM32-NONSFI: bl {{.*}} <testCallRegular> {{.*}} R_ARM_CALL
29
23 define internal double @testCallBuiltin(double %val) { 30 define internal double @testCallBuiltin(double %val) {
24 entry: 31 entry:
25 %result = frem double %val, %val 32 %result = frem double %val, %val
26 ret double %result 33 ret double %result
27 } 34 }
28 ; Expect a simple direct call to fmod. 35 ; Expect a simple direct call to fmod.
29 ; NONSFI-LABEL: testCallBuiltin 36 ; NONSFI-LABEL: testCallBuiltin
30 ; NONSFI: call {{.*}} R_386_PC32 fmod 37 ; NONSFI: call {{.*}} R_386_PC32 fmod
31 ; DEFAULT-LABEL: testCallBuiltin 38 ; DEFAULT-LABEL: testCallBuiltin
32 39
40 ; ARM32-NONSFI-LABEL: testCallBuiltin
41 ; ARM32-NONSFI: bl {{.*}} <fmod> {{.*}} R_ARM_CALL
42
33 define internal i32 @testLoadBasic() { 43 define internal i32 @testLoadBasic() {
34 entry: 44 entry:
35 %a = bitcast [4 x i8]* @G1 to i32* 45 %a = bitcast [4 x i8]* @G1 to i32*
36 %b = load i32, i32* %a, align 1 46 %b = load i32, i32* %a, align 1
37 ret i32 %b 47 ret i32 %b
38 } 48 }
39 ; Expect a load with a R_386_GOTOFF relocation. 49 ; Expect a load with a R_386_GOTOFF relocation.
40 ; NONSFI-LABEL: testLoadBasic 50 ; NONSFI-LABEL: testLoadBasic
41 ; NONSFI: mov {{.*}} R_386_GOTOFF {{G1|.bss}} 51 ; NONSFI: mov {{.*}} R_386_GOTOFF {{G1|.bss}}
42 ; DEFAULT-LABEL: testLoadBasic 52 ; DEFAULT-LABEL: testLoadBasic
43 53
54 ; ARM32 PIC load.
55 ; ARM32-NONSFI-LABEL: testLoadBasic
56 ; ARM32-NONSFI: movw {{.*}} R_ARM_MOVW_PREL_NC _GLOBAL_OFFSET_TABLE_
57 ; ARM32-NONSFI-NEXT: movt {{.*}} R_ARM_MOVT_PREL _GLOBAL_OFFSET_TABLE_
58 ; ARM32-NONSFI: movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC {{.*}}G1
59 ; ARM32-NONSFI-NEXT: movt [[REG]], {{.*}} R_ARM_MOVT_PREL {{.*}}G1
60 ; ARM32-NONSFI-NEXT: ldr r{{[0-9]+}}, [pc, [[REG]]]
61
44 define internal i32 @testLoadFixedOffset() { 62 define internal i32 @testLoadFixedOffset() {
45 entry: 63 entry:
46 %a = ptrtoint [4 x i8]* @G1 to i32 64 %a = ptrtoint [4 x i8]* @G1 to i32
47 %a1 = add i32 %a, 4 65 %a1 = add i32 %a, 4
48 %a2 = inttoptr i32 %a1 to i32* 66 %a2 = inttoptr i32 %a1 to i32*
49 %b = load i32, i32* %a2, align 1 67 %b = load i32, i32* %a2, align 1
50 ret i32 %b 68 ret i32 %b
51 } 69 }
52 ; Expect a load with a R_386_GOTOFF relocation plus an immediate offset. 70 ; Expect a load with a R_386_GOTOFF relocation plus an immediate offset.
53 ; NONSFI-LABEL: testLoadFixedOffset 71 ; NONSFI-LABEL: testLoadFixedOffset
54 ; NONSFI: mov {{.*}}+0x4] {{.*}} R_386_GOTOFF {{G1|.bss}} 72 ; NONSFI: mov {{.*}}+0x4] {{.*}} R_386_GOTOFF {{G1|.bss}}
55 ; DEFAULT-LABEL: testLoadFixedOffset 73 ; DEFAULT-LABEL: testLoadFixedOffset
56 74
75 ; ARM32-NONSFI-LABEL: testLoadFixedOffset
76 ; ARM32-NONSFI: movw [[GOT:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC _GLOBAL_OFF SET_TABLE_
77 ; ARM32-NONSFI-NEXT: movt [[GOT]], {{.*}} R_ARM_MOVT_PREL _GLOBAL_OFFSET_TABLE_
78 ; ARM32-NONSFI: movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC {{.*}}G1
79 ; ARM32-NONSFI-NEXT: movt [[REG]], {{.*}} R_ARM_MOVT_PREL {{.*}}G1
80 ; ARM32-NONSFI-NEXT: ldr [[ADDR:r[0-9]+]], [pc, [[REG]]]
81 ; ARM32-NONSFI-NEXT: add [[G1BASE:r[0-9]+]], [[GOT]], [[ADDR]]
82 ; ARM32-NONSFI-NEXT: add {{.*}}, [[G1BASE]], #4
83
57 define internal i32 @testLoadIndexed(i32 %idx) { 84 define internal i32 @testLoadIndexed(i32 %idx) {
58 entry: 85 entry:
59 %a = ptrtoint [4 x i8]* @G1 to i32 86 %a = ptrtoint [4 x i8]* @G1 to i32
60 %a0 = mul i32 %idx, 4 87 %a0 = mul i32 %idx, 4
61 %a1 = add i32 %a0, 12 88 %a1 = add i32 %a0, 12
62 %a2 = add i32 %a1, %a 89 %a2 = add i32 %a1, %a
63 %a3 = inttoptr i32 %a2 to i32* 90 %a3 = inttoptr i32 %a2 to i32*
64 %b = load i32, i32* %a3, align 1 91 %b = load i32, i32* %a3, align 1
65 ret i32 %b 92 ret i32 %b
66 } 93 }
67 ; Expect a load with a R_386_GOTOFF relocation plus an immediate offset, plus a 94 ; Expect a load with a R_386_GOTOFF relocation plus an immediate offset, plus a
68 ; scaled index register. 95 ; scaled index register.
69 ; NONSFI-LABEL: testLoadIndexed 96 ; NONSFI-LABEL: testLoadIndexed
70 ; NONSFI: mov {{.*}}*4+0xc] {{.*}} R_386_GOTOFF {{G1|.bss}} 97 ; NONSFI: mov {{.*}}*4+0xc] {{.*}} R_386_GOTOFF {{G1|.bss}}
71 ; DEFAULT-LABEL: testLoadIndexed 98 ; DEFAULT-LABEL: testLoadIndexed
72 99
100 ; ARM32-NONSFI-LABEL: testLoadIndexed
101 ; ARM32-NONSFI: movw [[GOT:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC _GLOBAL_OFF SET_TABLE_
102 ; ARM32-NONSFI-NEXT: movt [[GOT]], {{.*}} R_ARM_MOVT_PREL _GLOBAL_OFFSET_TABLE_
103 ; ARM32-NONSFI: movw [[REG:r[0-9]+]], {{.*}} R_ARM_MOVW_PREL_NC {{.*}}G1
104 ; ARM32-NONSFI-NEXT: movt [[REG]], {{.*}} R_ARM_MOVT_PREL {{.*}}G1
105 ; ARM32-NONSFI-NEXT: ldr [[ADDR:r[0-9]+]], [pc, [[REG]]]
106 ; ARM32-NONSFI-NEXT: add [[G1BASE:r[0-9]+]], [[GOT]], [[ADDR]]
107 ; ARaM32-NONSFI-NEXT: add {{.*}}, [[G1BASE]]
108
73 define internal i32 @testLoadIndexedBase(i32 %base, i32 %idx) { 109 define internal i32 @testLoadIndexedBase(i32 %base, i32 %idx) {
74 entry: 110 entry:
75 %a = ptrtoint [4 x i8]* @G1 to i32 111 %a = ptrtoint [4 x i8]* @G1 to i32
76 %a0 = mul i32 %idx, 4 112 %a0 = mul i32 %idx, 4
77 %a1 = add i32 %a0, %base 113 %a1 = add i32 %a0, %base
78 %a2 = add i32 %a1, %a 114 %a2 = add i32 %a1, %a
79 %a3 = add i32 %a2, 12 115 %a3 = add i32 %a2, 12
80 %a4 = inttoptr i32 %a3 to i32* 116 %a4 = inttoptr i32 %a3 to i32*
81 %b = load i32, i32* %a4, align 1 117 %b = load i32, i32* %a4, align 1
82 ret i32 %b 118 ret i32 %b
(...skipping 27 matching lines...) Expand all
110 %a = bitcast [4 x i8]* @G1 to i32* 146 %a = bitcast [4 x i8]* @G1 to i32*
111 %b = load i32, i32* %a, align 1 147 %b = load i32, i32* %a, align 1
112 %c = add i32 %b, 1234 148 %c = add i32 %b, 1234
113 store i32 %c, i32* %a, align 1 149 store i32 %c, i32* %a, align 1
114 ret void 150 ret void
115 } 151 }
116 ; Expect an RMW optimization with a R_386_GOTOFF relocation. 152 ; Expect an RMW optimization with a R_386_GOTOFF relocation.
117 ; NONSFI-LABEL: testRMW 153 ; NONSFI-LABEL: testRMW
118 ; NONSFI: add DWORD PTR {{.*}}+0x0],0x4d2 {{.*}} R_386_GOTOFF {{G1|.bss}} 154 ; NONSFI: add DWORD PTR {{.*}}+0x0],0x4d2 {{.*}} R_386_GOTOFF {{G1|.bss}}
119 ; DEFAULT-LABEL: testRMW 155 ; DEFAULT-LABEL: testRMW
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